AX88796LF ASIX Electronics, AX88796LF Datasheet - Page 46

• Manufacturer Part Number: AX88796LF
• Description: 3-in-1 Local CPU Bus Fast Rthernet Controller
• Manufacturer: ASIX Electronics

17.15-13
17.12
17.11
17.10
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
20.[15:0]
5.2.10 MR17 –Autonegotiation Register A Bit Descriptions
5.2.11 MR18 –Autonegotiation Register B Bit Descriptions
5.2.12 MR20 –User Defined Register Bit Descriptions
FIELD
FIELD
FIELD
AX88796 L
TYPE
TYPE
TYPE
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reserved. Always 0.
Next Page Wait.
Wait Link_Fail_Inhibit_Wait_Timer (Link Status Check).
Wait Autoneg_Wait_Timer (Link Status Check).
Wait Break_Link_Timer (Transmit Disable).
Parallel Detection Fault.
Autonegotiation Enable.
FLP Link Good Check.
Complete Acknowledge.
Acknowledge Detect.
FLP Link Good.
Link Status Check.
Ability Detect.
Transmit Disable.
Receiving FLPs. Any of FLP Capture, Clock, Data_0, or Data_1 (FLP
Rcv).
FLP Pass (FLP Rcv).
Link Pulse Count (FLP Rcv).
Link Pulse Detect (FLP Rcv).
Test Pass (NLP Rcv).
Test Fail Count (NLP Rcv).
Test Fail Extend (NLP Rcv).
Wait Max Timer Ack (NLP Rcv).
Detect Freeze (NLP Rcv).
Test Fail (NLP Rcv).
Transmit Count Ack (FLP Xmit).
Transmit Data Bit (FLP Xmit).
Transmit Clock Bit (FLP Xmit).
Transmit ability (FLP Xmit).
Transmit Remaining Acknowledge (FLP Xmit).
Idle (FLP Xmit).
The data written into this user-defined register appears on the
REG20_OUT[15:0] bus.
3-in-1 Local Bus Fast Ethernet Controller
46
DESCRIPTION
DESCRIPTION
DESCRIPTION
ASIX ELECTRONICS CORPORATION