VT8601 Via, VT8601 Datasheet - Page 48

• Manufacturer Part Number: VT8601
• Description: Slot-1 / Socket-370 PCI North Bridge
• Manufacturer: Via

Device 0 Offset 69 – DRAM Clock Select (00h) .............. RW
Revision 1.3 September 8, 1999
7-6
5
4
3
2
1
0
7HFKQRORJLHV ,QF
Rx68[1-0]
DRAM Operating Frequency Select ................. RW
256M bit DRAM Support
DRAM Controller Command Register Output
Fast DRAM Precharge for Different Bank
DRAM 4K Pages (for 64Mbit DRAM)
Registered DIMM Support
Reserved
:H &
:H &R R QQHFW
0
1
0
1
0
1
0
1
0
1
00
00
01
01
01
10
10
QQHFW
Disable ...................................................default
Enable (DCLKRD becomes output)
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Rx69[7-6]
........................................ always reads 0
00
01
00
10
01
00
10
CPU/DRAM
66/66
66/100
100/100
100/66
100/133
133/133
133/100
(default)
-42-
Device 0 Offset 6A - Refresh Counter ............................. RW
Device 0 Offset 6B - DRAM Arbitration Control (01h) RW
7-0
7-6
5
4
3
2
1
0
Refresh Counter (in units of 16 CPUCLKs)
The programmed value is the desired number of 16-
CPUCLK units minus one.
Arbitration Parking Policy
Fast Read to Write Turnaround
Memory Module Configuration ..........................RO
This bit is latched from MAB7# at the rising edge of
RESET#.
MD Bus Second Level Strength Control
CAS Second Level Strength Control
Virtual Channel-SDRAM
Multi-Page Open
00 DRAM Refresh Disabled....................... default
01 32 CPUCLKs
02 48 CPUCLKs
03 64 CPUCLKs
04 80 CPUCLKs
05 96 CPUCLKs
… …
00 Park at last bus owner ............................ default
01 Park at CPU side
10 Park at AGP side
11 Reserved
0
1
0
1
0
1
0
1
0
1
0
1
Disable................................................... default
Enable
Normal Operation .................................. default
Unused Outputs Tristated (RASB#, CASB#,
CKE, MAB, DCLKO)
Normal slew rate control........................ default
More slew rate control
Normal slew rate control........................ default
More slew rate control
Disable................................................... default
Enable
Disable (page registers marked invalid and no
page register update which causes non page-
mode operation)
Enable .................................................... default
Device 0 Bus 0 Host Bridge Registers
VT8601 Apollo ProMedia