HM17CM4096 ETC2 [List of Unclassifed Manufacturers], HM17CM4096 Datasheet - Page 30

• Manufacturer Part Number: HM17CM4096
• Description: 128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

the status of SWAP register and REF register, the same method as 8 bit access.
notice) internal access X address :n
notice) internal access X address :n
When display RAM is accessed by 16 bit data width, the weight of each data bit is dependent on
12 bit data are extracted from 16 bit address, and then transmitted to gradation palettes.
At 8 bit – 4096 gradation mode , two 8 bit address map is used at display.
More detail information, please refer to bit assign table.
ACCESS when (REF, SWAP)=(0, 0) or (1, 1)
ACCESS when (REF, SWAP)=(0, 1) or (1, 0)
LSB
MSB
D
D
0
1
0
0
1
1
Palette Aj
Palette Cj
X address :n
X address :n
SEGAi
SEGAi
D
D
0
1
0
0
2
2
D
D
0
0
1
0
3
3
MSB LSB
LSB MSB
Aj
Aj
D
D
0
0
1
0
4
H
4
H
:FF
:FF
H
H
D
~FF
D
~FF
1
1
0
1
H
H
7
~n
7
~n
Palette Bj
Palette Bj
H
H
H
H
D
D
SEGBi
SEGBi
0
0
1
0
0
0
(access when REF=”0”)
(access when REF=”1”)
(access when REF=”0”)
(access when REF=”1”)
D
D
1
1
0
1
1
1
MSB LSB
LSB MSB
D
D
0
1
0
0
2
2
X address :n+1
X address :n+1
D
D
1
0
1
1
4
4
Palette Cj
Palette Aj
D
D
1
0
SEGCi
1
SEGCi
1
5
5
D
D
1
1
0
1
H
H
6
6
D
D
1
1
0
1
MSB
LSB
7
7
i=0~127
Gradation palette
j=0~15
Gradation
control circuit.
Display RAM data
CPU access data
i=0~127
Gradation palette
j=0~15
Gradation
control circuit.
Display RAM data
CPU access data
HM17CM4096
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