HM17CM4096 ETC2 [List of Unclassifed Manufacturers], HM17CM4096 Datasheet - Page 29
![no-image](/images/no-image-200.jpg)
HM17CM4096
Manufacturer Part Number
HM17CM4096
Description
128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.HM17CM4096.pdf
(67 pages)
- Current page: 29 of 67
- Download datasheet (2Mb)
(11) display data structure and gradation control
per output to achieve the gradation display.
of three outputs of segment driver, and so 4096 color ( 4 bits x 4 bits x 4 bits ) display on 128 x 162
pixels is realized.
fast and naturally.
when data is written to the display RAM.
notice) internal access X address :n
notice) internal access X address :n
For the purpose of gradation control, information per pixel requires multiple bits. This IC has 4 bit
This IC is connected to an STN color LCD panel by three segment port units and one pixel consists
Since one pixel data can be processed by one time access to memory, the data can be rewritten
The weight of each data bit is dependent on the status of SWAP register bit and REF register
ACCESS when (REF, SWAP)=(0, 0) or (1, 1)
ACCESS when (REF, SWAP)=(0, 1) or (1, 0)
LSB
MSB
D
D
0
1
0
0
1
1
Palette Aj
Palette Cj
SEGAi
SEGAi
D
D
0
1
0
0
2
2
D
D
0
0
1
0
3
3
MSB LSB
LSB MSB
Aj
Aj
D
D
0
0
1
0
4
4
:7F
:7F
H
H
D
~7F
D
~7F
1
1
H
0
1
H
~n
~n
7
7
Palette Bj
Palette Bj
H
H
H
H
D
D
SEGBi
SEGBi
0
0
1
0
8
8
(access when REF=”0”)
(access when REF=”1”)
(access when REF=”0”)
(access when REF=”1”)
D
D
1
1
0
1
9
9
MSB LSB
LSB MSB
D
D
0
1
0
0
10
10
D
D
1
0
1
1
12
12
Palette Cj
Palette Aj
D
D
1
0
SEGCi
1
SEGCi
1
13
13
D
D
1
1
0
1
14
14
D
D
1
1
0
1
MSB
LSB
15
15
i=0~127
Gradation palette
j=0~15
Gradation
control circuit.
Display RAM data
CPU access data
X address :n
i=0~127
Gradation palette
j=0~15
Gradation
control circuit.
Display RAM data
CPU access data
X address :n
HM17CM4096
H
H
- 29 -
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