HM17CM4096 ETC2 [List of Unclassifed Manufacturers], HM17CM4096 Datasheet - Page 17

• Manufacturer Part Number: HM17CM4096
• Description: 128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

(2) DDRAM and internal register access
address is shown directly after the end of the read command, so pay attention that assigned data is
available at 2nd timing step.
data bus D
falling edge of E (68 series).
until next cycle.
needs dummy read at the 2nd clock.
(1-7) One systematization of CS under some interface
DDRAM / register select pin (RS), read / write control pin (RD) or WR pin.
There are rules at reading data out of display RAM, after address setting, the data of assigned
In other words, 1 cycle dummy read is needed after address setting and write cycle.
Write process starts after address setting and then the data on the 8bit data bus D
Internally, bus holder data is processed to data bus and data are written to bus holder from CPU
After address setting, data of assigned address are read at the 1st and 3rd clock, which means it
DDRAM and internal register are accessed by data bus D
When CS=“H”, it is in non-selective state and DDRAM and internal register access is impossible.
During access, Set CS=“L”.
Access selection to DDRAM or internal register is controlled by RS input.
state should be released (CS = “H”) after 9bit data transfer as shown in the following figure.
CS
SDA
SCL
TABLE
In some operation mode, data interface control is possible.
Data in-out is possible under the condition, CS = “L”.
Serial clock (SCL) should go to “L” at the non-access period and after 9bit data transfer.
SDA and SCL signals are sensitive to external noise. To prevent miss operation chip selector
RS
H
L
0
~D
15
will be written in by CPU. The data is written at the rising edge of WR (80 series) or
Internal command register
RS
1
Display RAM data
Data contents
D
2
7
D
6
3
3line serial interface
D
4
5
D
5
4
D
3
6
0
~D
7
D
(D
2
7
0
~D
HM17CM4096
15
D
), chip select pin (CS),
1
8
D
0
9
0
~D
7
or 16bit
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