MSP3411G Micronas, MSP3411G Datasheet - Page 18
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MSP3411G
Manufacturer Part Number
MSP3411G
Description
(MSP34x1G) Multistandard Sound Processor Family
Manufacturer
Micronas
Datasheet
1.MSP3411G.pdf
(102 pages)
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MSP 34x1G
Table 3–1: I
Table 3–2: I
3.1.2. Description of CONTROL Register
Table 3–3: CONTROL as a Write Register
Table 3–4: CONTROL as a Read Register
18
ADR_SEL
Mode
MSP device address
Name
CONTROL
TEST
WR_DEM
RD_DEM
WR_DSP
RD_DSP
Name
CONTROL
Name
CONTROL
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on,
read once to be resetted.
2
2
C Bus Device Addresses
C Bus Subaddresses
Subaddress
00 hex
Subaddress
00 hex
Binary Value
0000 0000
0000 0001
0001 0000
0001 0001
0001 0010
0001 0011
Write
80 hex
Bit[15] (MSB)
1 : RESET
0 : normal
Bit[15] (MSB)
Reset status after last reading of CONTROL:
0 : no reset occured
1 : reset occured
Low
Hex Value
00
01
10
11
12
13
Read
81 hex
(only
MSP 34x1G
Mode
Read/Write
Write
Write
Write
Write
Write
Write
84 hex
-versions from A2 on)
High
Function
Write: Software reset of MSP (see Table 3–3)
Read: Hardware error status of MSP
only for internal use
write address demodulator
read address demodulator
write address DSP
read address DSP
Read
85 hex
bit[15] of CONTROL
Bits[14:0]
0
Bit[14]
Internal hardware status:
0 : no error occured
1 : internal error occured
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
Write
88 hex
will be set; it must be
Left Open
Bits[13:0]
not of interest
Read
89 hex