H5TQ4G43AMR HYNIX [Hynix Semiconductor], H5TQ4G43AMR Datasheet - Page 14

• Manufacturer Part Number: H5TQ4G43AMR
• Description: 4Gb DDR3 SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Table 1 -Timings used for IDD and IDDQ Measurement-Loop Patterns
Table 2 -Basic IDD and IDDQ Measurement Conditions
Rev. 1.0 / Dec. 2009
t
CL
n
n
n
n
n
n
n
n
n
n
n
CK
RCD
RC
RAS
RP
FAW
RRD
RFC
RFC
RFC
RFC
RFC
Symbol
I
I
DD0
DD1
-1 Gb
- 2 Gb
- 4 Gb
- 8 Gb
-512Mb
Symbol
1KB page size
2KB page size
1KB page size
2KB page size
Operating One Bank Active-Precharge Current
CKE: High; External clock: On; tCK, nRC, nRAS, CL: see Table 1; BL: 8
and PRE; Command, Address, Bank Address Inputs: partially toggling according to Table 3; Data IO:
MID-LEVEL; DM: stable at 0; Bank Activity: Cycling with one bank active at a time: 0,0,1,1,2,2,... (see
Table 3); Output Buffer and RTT: Enabled in Mode Registers
see Table 3.
Operating One Bank Active-Precharge Current
CKE: High; External clock: On; tCK, nRC, nRAS, nRCD, CL: see Table 1; BL: 8
ACT, RD and PRE; Command, Address; Bank Address Inputs, Data IO: partially toggling according to
Table 4; DM: stable at 0; Bank Activity: Cycling with on bank active at a time: 0,0,1,1,2,2,... (see Table
4); Output Buffer and RTT: Enabled in Mode Registers
Table 4.
DDR3-1066
7-7-7
1.875
160
187
27
20
20
27
48
59
86
7
7
7
4
6
Description
b)
; ODT Signal: stable at 0; Pattern Details: see
b)
; ODT Signal: stable at 0; Pattern Details:
DDR3-1333
a)
; AL: 0; CS: High between ACT
9-9-9
107
200
234
1.5
33
24
20
30
60
74
9
9
9
4
5
a)
; AL: 0; CS: High between
Unit
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
14