K4J55323QF-GC15 Samsung, K4J55323QF-GC15 Datasheet - Page 46

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K4J55323QF-GC15

Manufacturer Part Number
K4J55323QF-GC15
Description
256Mbit GDDR3 SDRAM
Manufacturer
Samsung
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
K4J55323QF-GC15
Manufacturer:
SAMSUNG
Quantity:
6 000
(Recommended operating conditions unless otherwise noted,
K4J55323QF-GC
DC CHARACTERISTICS
Note : 1. Measured with outputs open and ODT off
CAPACITANCE
Operating Current
(One Bank Active)
Precharge Standby Current
in Power-down mode
Precharge Standby Current
in Non Power-down mode
Active Standby Current
power-down mode
Active Standby Current in
in Non Power-down mode
Operating Current
Refresh Current
Self Refresh Current
Operating Current
(4Bank interleaving)
( Burst Mode)
Input capacitance ( CK, CK )
Input capacitance (A
Input capacitance
( CKE, CS, RAS,CAS, WE )
Data & DQS input/output capacitance(DQ
Input capacitance(DM0 ~ DM3)
2. Refresh period is 32ms
3. Measured current at VDD & VDDQ = 2.0V
Parameter
0
Parameter
~A
(V
11
DD
, BA
=2.0V, T
I
CC6
Symbol
0
I
I
I
I
~BA
CC2
CC3
CC2
CC3
I
I
I
I
CC1
CC4
CC5
CC7
N
N
P
P
-GC
1
-GL
)
A
= 25°C, f=1MHz)
0
Burst Length=4
t
per clock cycle. Address and control inputs
changing once per clock cycle
CKE ≤ V
CKE ≥ V
clock cycle
CKE ≤ V
CKE ≥ VIH(min), CS ≥ VIH(min),
DQ,DM,DQS inputs changing twice per clock
cycle. Address and control inputs changing
once per clock cycle
I
Page Burst, All Banks activated. DQ,DM,DQS
inputs changing twice per clock cycle. Address
and control inputs changing once per clock.
t
CKE ≤ 0.2V
Burst Length=4
t
per clock cycle. Address and control inputs
changing once per clock cycle
~DQ
Address and control inputs changing once per
OL
CC
RC
CC
=0mA ,
(min). DQ,DM,DQS inputs changing twice
(min). DQ,DM,DQS inputs changing twice
t
RFC
31
)
IL
IH
IL
(max),
(max),
t
(min), CS ≥ V
CC
=
Test Condition
t
CC
t
t
t
t
RC
RC
CC
CC
(min),
=
=
- 46 -
t
t
t
t
CC
RC
CC
RC
Symbol
IH
(min)
C
(min).
(min)
(min).
0°C ≤ Tc ≤85°C
(min),
C
C
C
C
OUT
IN1
IN2
IN3
IN4
t
I
I
CC
OL
OL
t
CC
=
=0mA,
=0mA,
=
t
CC
t
CC
(min)
(min)
t
t
CC
CC
)
=
=
Min
2.0
2.0
2.0
3.5
3.5
1060
505
140
220
175
385
940
440
-14
256M GDDR3 SDRAM
1055
500
140
215
170
380
935
435
-15
Version
Max
3.0
3.0
3.0
4.5
4.5
20
5
Rev 1.7 (Jan. 2005)
495
135
200
160
350
865
420
970
-16
485
130
185
145
265
750
390
950
-20
Unit
pF
pF
pF
pF
pF
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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