KMM5362205C2W SAMSUNG [Samsung semiconductor], KMM5362205C2W Datasheet
KMM5362205C2W
Related parts for KMM5362205C2W
KMM5362205C2W Summary of contents
Page 1
... DRAM MODULE 2Mx36 DRAM SIMM (1MX16 Base, Quad CAS EDO) Revision 0.0 November 1997 - 1 - KMM5362205C2W/C2WG Rev. 0.0 (Nov. 1997) ...
Page 2
... DRAM MODULE Revision History Version 0.0 (November 1997) • Changed module PCB from 6-Layer to 4-Layer. • Changed Module Part No. from KMM5362205CW/CWG to KMM5362205C2W/C2WG caused by PCB revision . KMM5362205C2W/C2WG - 2 - Rev. 0.0 (Nov. 1997) ...
Page 3
... DRAM MODULE KMM5362205C2W/C2WG Fast Page Mode with Extended Data Out DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh, GENERAL DESCRIPTION The Samsung KMM5362205C2W is a 2Mx36bits Dynamic RAM high density memory module. KMM5362205C2W consists of four CMOS 1Mx16bits DRAMs in 42-pin SOJ package and two CMOS 1Mx4 bit Quad CAS with EDO DRAM in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate ...
Page 4
... DQ3 DQ4 DQ5 DQ6 DQ7 U1 DQ27-DQ34 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 W A0-A9 Vcc .1 or .22uF Capacitor for each DRAM Vss - 4 - KMM5362205C2W/C2WG DQ0 RAS DQ1 DQ2 DQ3 DQ4 LCAS DQ5 DQ6 DQ7 U3 UCAS DQ8 DQ9 DQ10 DQ11 OE DQ12 DQ13 DQ14 ...
Page 5
... CAS cycling : =min) IL HPC t =min) RC Vcc+0.5V, all other pins not under test Vcc) OUT = -5mA) = 4.2mA) and I , address can be changed maximum once while RAS=V CC1 CC3 - 5 - KMM5362205C2W/C2WG Rating - +7.0 -55 to +150 Min Typ Max 4.5 5.5 5 ...
Page 6
... RRH t 10 WCH RWL t 13 CWL REF t 0 WCS t 5 CSR t 10 CHR t 5 RPC t CPA - 6 - KMM5362205C2W/C2WG Min Max Max Min Max 110 10K 60 10K 17 50 ...
Page 7
... WEZ t 15 WED t 5 WPE t 5 CLCH 8. 9. 10. t (max) RAC 11. t (max) limit, then RCD t . CAC 12 13. 14 KMM5362205C2W/C2WG -5 -6 Max Min Max 30 10 200K 60 200K Either or must be satisfied for a read cycle. ...
Page 8
... RAS t CSH CRP t RCD t RAD t t RAH ASC t CAH ROW COLUMN ADDRESS ADDRESS t RCS CLZ t RAC OPEN - 8 - KMM5362205C2W/C2WG CRP t RSH t CAS t RAL t RRH t CEZ CAC t REZ DATA-OUT Rev. 0.0 (Nov. 1997) t RCH t WEZ Don t care Undefined ...
Page 9
... ASR ADDRESS RAS t CSH t RCD t RAD t t RAH ASC t CAH ROW COLUMN ADDRESS t CWL t RWL t WCS t WCH DATA- KMM5362205C2W/C2WG CRP t RSH t CAS t RAL Rev. 0.0 (Nov. 1997) Don t care Undefined ...
Page 10
... RAH ASC CAH ASC CAH COLUMN COLUMN ADDRESS ADDRESS t RCS t CAC CPA CAC t DOH t RAC VALID DATA-OUT t CLZ - 10 - KMM5362205C2W/C2WG t RHCP t HPC CAS CAS ASC CAH ASC CAH COLUMN COLUMN ADDR ADDRESS t RCH t CPA t t CAC ...
Page 11
... WCS WCH WCS WCH CWL CWL VALID VALID DATA-IN DATA- KMM5362205C2W/C2WG t RHCP t t HPC RSH CAS CAS ¡ó ASC CAH ¡ó COLUMN ADDRESS ¡ó WCS WCH ¡ó ...
Page 12
... In RAS-only refresh cycle of 64Mb A-dile & B-die, when CAS signal transits from Low to High, the valid data may be cut off. t RAS t RP RPC CSR t CHR t WRP t WRH - 12 - KMM5362205C2W/C2WG RPC RAS t RPC OPEN Rev. 0.0 (Nov. 1997) ...
Page 13
... RAS t t RCD RSH t RAD t t RAH ASC t CAH ROW COLUMN ADDRESS t RCS CAC t CLZ t RAC OPEN - 13 - KMM5362205C2W/C2WG RAS t CHR t WRH t WRP RRH t REZ t WEZ DATA-OUT Rev. 0.0 (Nov. 1997 CEZ Don t care Undefined ...
Page 14
... ADDRESS RAS CRP t t RCD RSH t RAD t t RAH ASC t CAH ROW COLUMN ADDRESS t WCS t WCH DATA- KMM5362205C2W/C2WG RAS t CHR t WRH t WRP Don t care Undefined Rev. 0.0 (Nov. 1997) ...
Page 15
... IL NOTE : This timing diagram is applied to all devices besides 64M DRAM based modules. t RAS t CPT t CHR t ASC COLUMN ADDRESS t t WRH RCS t CLZ t WRH t WCS KMM5362205C2W/C2WG RSH t CAS t RAL t CAH t RRH RCH CAC DATA-OUT t RWL t CWL t WCH ...
Page 16
... IH CAS CEZ RPC CSR t t WRP WRH t RP RPC CSR t CHR t WTS t WTH - 16 - KMM5362205C2W/C2WG t t RASS RPS t RPC t CHS OPEN RAS t RPC OPEN Rev. 0.0 (Nov. 1997) Don t care Undefined ...
Page 17
... Gold & Solder Plating Lead .010(.25)MAX .050(1.27) Tolerances : .005(.13) unless otherwise specified NOTE : The used device are 1Mx16 EDO DRAM and 1Mx4 Quad CAS with EDO DRAM. DRAM Part No. : KMM5362205C2W/C2WG -- KM416C1204CJ (400 mil) Revision History Rev 0.0 : Nov. 1997 4.250(107.95) 3.984(101.19) R ...