GS8662S08E GSI [GSI Technology], GS8662S08E Datasheet - Page 6
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GS8662S08E
Manufacturer Part Number
GS8662S08E
Description
72Mb Burst of 2 DDR SigmaSIO-II SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS8662S08E.pdf
(37 pages)
Pin Description Table
Rev: 1.01 9/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
C, C, K, or K cannot be set to V
When ZQ pin is directly connected to V
unconnected.
NC = Not Connected to die or any other pin
NW0–NW1
BW0–BW1
BW0–BW3
Symbol
V
D
V
TMS
TCK
TDO
R/W
V
V
TDI
NC
CQ
CQ
SA
ZQ
LD
Dn
Qn
DDQ
REF
OFF
K
C
K
C
DD
SS
REF
Output Impedance Matching Input
HSTL Input Reference Voltage
Isolated Output Buffer Supply
voltage.
Synchronous Address Inputs
Synchronous Nybble Writes
Synchronous Data Outputs
Synchronous Data Inputs
Synchronous Byte Writes
Synchronous Byte Writes
Synchronous Load Pin
Power Supply: Ground
DD
Read/Write Contol Pin
Output Echo Clock
Output Echo Clock
, output impedance is set to minimum value and it cannot be connected to ground or left
Test Mode Select
Test Data Output
Test Clock Input
Test Data Input
Description
Power Supply
Output Clock
Output Clock
DLL Disable
No Connect
Input Clock
Input Clock
6/37
GS8662S08/09/18/36E-333/300/250/200/167
Supply
Supply
Supply
Output
Output
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
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Write Active Low; Read Active High
1.8 or 1.5 V Nominal
1.8 V Nominal
Comments
x08 Version
x18 Version
x36 Version
Active High
Active High
Active High
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
© 2005, GSI Technology
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Preliminary