GS820H32Q-4I GSI [GSI Technology], GS820H32Q-4I Datasheet - Page 17

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GS820H32Q-4I

Manufacturer Part Number
GS820H32Q-4I
Description
64K x 32 2M Synchronous Burst SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Rev: 1.03 2/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Pipelined SCD Read Cycle Timing
BW
DQ
A
A
- BW
ADSP
ADSC
- DQ
ADV
GW
BW
CK
A
E
E
E
D
G
D
n
1
2
3
Hi-Z
tS tH
tS
tS tH
tS
tS
Single Read
RD1
tH
tH
tH
tOLZ
tLZ
tS
tS
tS
tH
tKQ
tOE
tS tH
RD2
Q1
E
2
tKH
17/23
and E
A
tOHZ
tKL
3
only sampled with ADSP or ADSC
Burst Read
tKC
tKQX
Q2
ADSP is blocked by E
E1 masks ADSP
A
Suspend Burst
GS820H32T/Q-150/138/133/117/100/66
Q2
B
Q2
ADSC initiated read
1
inactive
C
RD3
© 1999, Giga Semiconductor, Inc.
Q2
Deselected with E
tH
tH
D
tKQX
Q3
A
tHZ
2
D

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