GS820H32Q-4I GSI [GSI Technology], GS820H32Q-4I Datasheet - Page 11
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GS820H32Q-4I
Manufacturer Part Number
GS820H32Q-4I
Description
64K x 32 2M Synchronous Burst SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS820H32Q-4I.pdf
(23 pages)
AC Test Conditions
Notes:
1.
2.
3.
4.
DC Electrical Characteristics
Rev: 1.03 2/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Input Leakage Current
(except mode pins)
ZZ Input Current
Mode Pin Input Current
Output Leakage Current
Output High Voltage
Output High Voltage
Output Low Voltage
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.
Output Load 2 for t
Device is deselected as defined by the Truth Table.
Parameter
Parameter
LZ
DQ
, t
HZ
Symbol
I
, t
V
V
I
V
INZZ
I
INM
I
OL
OH
OH
IL
OL
OLZ
and t
Output Load 1
I
I
OH
OH
OHZ
= - 8mA, V
= -8mA, V
Test Conditions
V
V
0V V
0V
V
.
Output Disable,
V
DD
DD
OUT
VT=1.25V
IN
I
OL
Conditions
= 0 to V
= 0 to V
Fig. 1& 2
V
V
= 8mA
V
1V/ns
1.25V
1.25V
IN
IN
0.2V
IN
2.3V
IN
DDQ
50
DDQ
DD
V
V
=3.135V
V
=2.375V
V
DD
* Distributed Test Jig Capacitance
IH
IL
IH
IL
11/23
30pF
-300uA
-1uA
-1uA
-1uA
-1uA
-1uA
*
Min
1.7V
2.4V
300uA
Max
0.4V
1uA
1uA
1uA
1uA
1uA
GS820H32T/Q-150/138/133/117/100/66
DQ
Output Load 2
5pF
*
2.5V
© 1999, Giga Semiconductor, Inc.
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