GS880E36BT-250IV GSI [GSI Technology], GS880E36BT-250IV Datasheet - Page 5
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GS880E36BT-250IV
Manufacturer Part Number
GS880E36BT-250IV
Description
512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS880E36BT-250IV.pdf
(23 pages)
TQFP Pin Description
Rev: 1.00 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
ADSP, ADSC
A
Symbol
, B
A
E
V
ADV
DQ
DQ
DQ
DQ
LBO
V
GW
V
BW
0
NC
B,
CK
1
ZZ
E
FT
DDQ
G
A
, A
, E
DD
SS
B
2
A
B
C
D
C
1
3
, B
D
Type
I/O
—
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
5/23
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter preset Inputs
Byte Write Enable for DQ
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep Mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
I/O and Core Ground
Core power supply
Address Inputs
Description
No Connect
A
, DQ
B
Data I/Os; active low
GS880E18/32/36BT-xxxV
© 2006, GSI Technology