GS88018T GSI [GSI Technology], GS88018T Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
GS88018T
Manufacturer Part Number
GS88018T
Description
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS88018T.pdf
(25 pages)
- Current page: 9 of 25
- Download datasheet (2Mb)
Notes:
1.
2.
3.
Rev: 1.11 8/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
The upper portion of the diagram assumes active use of only the Enable (E1,E2, and E3) and Write (B
inputs, and that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
X
CW
X
First Write
Burst Write
W
W
CW
9/25
W
CR
R
CR
R
Deselect
X
R
CR
First Read
Burst Read
GS88018/32/36T-11/11.5/100/80/66
R
R
CR
A
, B
X
X
B
© 2000, Giga Semiconductor, Inc.
, B
C
, B
D
, BW, and GW) control
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