IC42S16800 ICSI [Integrated Circuit Solution Inc], IC42S16800 Datasheet - Page 26
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IC42S16800
Manufacturer Part Number
IC42S16800
Description
4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S16800.pdf
(69 pages)
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IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
BURST Termination
There are two methods to terminate a burst operation other than using a read or a write command. One is the burst stop
command and the other is the precharge command.
BURST Stop Command
During a read burst, when the burst stop command is issued, the burst read data are terminated and the data bus goes to
high-impedance after the CAS latency from the burst stop command.
During a write burst, when the burst stop command is issued, the burst write data are termained and data bus goes to Hi-
Z at the same clock with the burst stop command.
Burst Termination
Remark BST: Burst stop command
Remark BST: Burst command
26
CAS latency =2,3
Command
CLK
DQ
CAS latency =3
CAS latency =2
Command
CLK
DQ
DQ
T0
T0
Write
Q0
Read
T1
T1
Q0
T2
T2
Q0
Q1
T3
T3
BST
Q1
Q0
Q2
T4
T4
Q2
Q1
BST
T5
T5
Q2
Integrated Circuit Solution Inc.
Burst lengh=X, CAS Intency=2,3
Hi-Z
Burst lengh=X, CAS latency=2,3
T6
Hi-Z_
T6
Hi-Z
T7
T7
DR023-0E 6/11/2004