AT52SC1283J-70CI ATMEL [ATMEL Corporation], AT52SC1283J-70CI Datasheet - Page 17
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AT52SC1283J-70CI
Manufacturer Part Number
AT52SC1283J-70CI
Description
128-Mbit Flash + 32-Mbit/64-Mbit
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52SC1283J-70CI.pdf
(52 pages)
- Current page: 17 of 52
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6.29
6.31
3530B–STKD–2/4/05
Sector Erase Flowchart
Full Erase Status Check Flowchart
Sector
Sector
Sector
Status Check
Read Status
(If Desired)
Full Erase
Write 20,
Complete
Write D0,
Register
SR7 =
Start
Sector
Address
Address
Erase
Read Status
1
Successful
SR4, SR5
Register
SR5 =
SR1 =
SR3 =
Erase
0
0
0
0
(Erase Confirm)
=
0
(
Sector
1
1,1
1
1
Erase)
Suspend
Erase
Sequence Error
Sector
Sector
V
Command
No
P P
Error
Error
Error
Range
Locked
Erase
Yes
Suspend
Erase
Loop
AT52SC1283J/1284J [Preliminary]
6.32
6.30
SR1, SR3 must be cleared before the Write State Machine
allows further erase attempts.
Only the Clear Status Register command clears SR1, SR3,
SR4, SR5.
If an error is detected, clear the status register before
attempting an erase retry or other error recovery.
Repeat for subsequent sector erasures.
Full status register check can be done after each sector erase,
or after a sequence of sector erasures.
Write FF after the last operation to enter read mode.
Operation
Operation
Write
Write
Read
Bus
Bus
Idle
Idle
Idle
Idle
Idle
Full Erase Status Check Procedure
Sector Erase Procedure
Command
Command
Confirm
Sector
Erase
Setup
Erase
None
None
None
None
None
None
Comments
Check SR3:
1 = V
Check SR4, SR5:
Both 1 = Command Sequence
Error
Check SR5:
1 = Sector Erase Error
Check SR1:
1 = Attempted erase of locked
sector; erase aborted.
Comments
Data = 20
Addr = Sector to be erased (SA)
Data = D0
Addr = Sector to be erased (SA)
Status register data: Toggle CE
or
OE to update status register data
Check SR7
1 = WSMS Ready
0 = WSMS Busy
PP
Range Error
17
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