AT52SC1283J-70CI ATMEL [ATMEL Corporation], AT52SC1283J-70CI Datasheet - Page 11
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AT52SC1283J-70CI
Manufacturer Part Number
AT52SC1283J-70CI
Description
128-Mbit Flash + 32-Mbit/64-Mbit
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52SC1283J-70CI.pdf
(52 pages)
Table 6-3.
Note:
Table 6-4.
3530B–STKD–2/4/05
SR7 WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
SR6 = ERASE SUSPEND STATUS (ESS)
1 = Erase Suspended
0 = Erase In Progress/Completed
SR5 = ERASE STATUS (ES)
1 = Error in Sector Erase
0 = Successful Sector Erase
SR4 = PROGRAM STATUS (PRS)
1 = Error in Programming
0 = Successful Programming
SR3 = VPP STATUS (VPPS)
1 = VPP Low Detect, Operation Abort
0 = VPP OK
SR2 = PROGRAM SUSPEND STATUS (PSS)
1 = Program Suspended
0 = Program in Progress/Completed
SR1 = SECTOR LOCK STATUS
1 = Prog/Erase attempted on a locked sector; Operation aborted.
0 = No operation to locked sectors
SR0 = Plane Status (PLS)
WSMS
(SR7)
WSMS
0
0
1
7
1. A Command Sequence Error is indicated when SR1, SR3, SR4 and SR5 are set.
Status Register Bit Definition
Status Register Device WSMS and Write Status Definition
(SR0)
PLS
0
1
x
ESS
6
Description
The addressed plane is performing a program/erase operation.
A plane other than the one currently addressed is performing a program/erase operation.
No program/erase operation is in progress in any plane. Erase and Program suspend bits (SR6, SR2)
indicate whether other planes are suspended.
ES
5
PRS
4
AT52SC1283J/1284J [Preliminary]
Check Write State Machine bit first to determine Word Program
or Sector Erase completion, before checking program or erase
status bits.
When Erase Suspend is issued, WSM halts execution and sets
both WSMS and ESS bits to “1” – ESS bit remains set to “1” until
an Erase Resume command is issued.
When this bit is set to “1”, WSM has applied the max number of
erase pulses to the sector and is still unable to verify successful
sector erasure.
When this bit is set to “1”, WSM has attempted but failed to
program a word
The V
level. The WSM interrogates V
Erase command sequences have been entered and informs the
system if V
before the operation is verified by the WSM.
When Program Suspend is issued, WSM halts execution and
sets both WSMS and PSS bits to “1”. PSS bit remains set to “1”
until a Program Resume command is issued.
If a Program or Erase operation is attempted to one of the locked
sectors, this bit is set by the WSM. The operation specified is
aborted and the device is returned to read status mode.
Indicates program or erase status of the addressed plane.
VPPS
PP
3
status bit does not provide continuous indication of VPP
PP
has not been switched on. The V
PSS
2
Notes
PP
level only after the Program or
SLS
1
PP
is also checked
PLS
0
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