AT52SC1283J-70CI ATMEL [ATMEL Corporation], AT52SC1283J-70CI Datasheet - Page 16
![no-image](/images/no-image-200.jpg)
AT52SC1283J-70CI
Manufacturer Part Number
AT52SC1283J-70CI
Description
128-Mbit Flash + 32-Mbit/64-Mbit
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52SC1283J-70CI.pdf
(52 pages)
- Current page: 16 of 52
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6.27
16
(Erase Resume)
Erase Suspend/Resume Flowchart
Read
AT52SC1283J/1284J [Preliminary]
the Same Plane
Any Address
Any Address
Any Address
Read Status
Any Address
or Program?
Write B0,
Write 70,
Write D0,
Resumed
Write 70H
Register
SR7 =
SR6 =
Done?
Erase
within
Read
Start
1
1
No
Yes
(Erase Suspend)
(Read Status)
0
0
(Read Status)
Program
Loop
Read Array
Completed
Write FF
Erase
Data
(Read Array)
6.28
If the Suspended Plane was placed in Read mode or a
Program loop:
Operation
Read or
Write
Write
Read
Write
Write
Write
Write
Bus
Idle
Idle
Erase Suspend/Resume Procedure
Command
Suspend
Program
Program
Resume
Read or
Status
Status
Erase
Read
None
None
None
None
Read
Comments
Data = B0
Addr = Any address within the
Same Plane
Data = 70
Addr = Any address
Status register data: Toggle CE
or
OE to update status register
Addr = Any address within the
Same Plane
Check SR7
1 = WSM Ready
0 = WSM Busy
Check SR6
1 = Erase suspended
0 = Erase completed
Data = FF or 40
Addr = Any address
Read or program data from/to
sector other than the one being
erased
Data = D0
Addr = Any address
Return Plane to Status mode:
Data = 70
Addr = Any address within the
Same Plane
3530B–STKD–2/4/05
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