SCN68681E1F40 PHILIPS [NXP Semiconductors], SCN68681E1F40 Datasheet
![no-image](/images/no-image-200.jpg)
SCN68681E1F40
Available stocks
Related parts for SCN68681E1F40
SCN68681E1F40 Summary of contents
Page 1
SCN68681 Dual asynchronous receiver/transmitter (DUART) Product specification Supersedes data of 1995 May 01 IC19 Data Handbook Philips Semiconductors INTEGRATED CIRCUITS 1998 Sep 04 ...
Page 2
... Single +5V power supply Commercial and industrial temperature ranges available DIP and PLCC packages COMMERCIAL INDUSTRIAL V = +5V +5 +5V + Not available SCN68681E1F40 SCN68681C1N40 SCN68681E1N40 SCN68681C1A44 SCN68681E1A44 2 Product specification SCN68681 DWG # 0590B SOT129-1 SOT187-2 853–1083 19970 ...
Page 3
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN CONFIGURATIONS A1 1 IP3 IP1 IP0 7 R/WN 8 DTACKN 9 RxDB 10 DIP TxDB 11 OP1 12 OP3 13 OP5 14 OP7 15 D1 ...
Page 4
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) BLOCK DIAGRAM 8 D0–D7 BUS BUFFER OPERATION CONTROL R/WN DTACKN ADDRESS DECODE CSN 4 A1–A4 R/W CONTROL RESETN INTERRUPT CONTROL INTRN IMR ISR IACKN IVR TIMING BAUD RATE GENERATOR CLOCK SELECTORS COUNTER/ TIMER X1/CLK ...
Page 5
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN DESCRIPTION SYMBOL TYPE D0-D7 I/O Data Bus: Bidirectional 3-State data bus used to transfer commands, data and status between the DUART and the CPU the least significant bit. CSN I Chip ...
Page 6
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DC ELECTRICAL CHARACTERISTICS SYMBOL SYMBOL PARAMETER PARAMETER V Input low voltage IL V Input high voltage (except X1/CLK Input high voltage (except X1/CLK Input high voltage (X1/CLK Output ...
Page 7
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) AC CHARACTERISTICS SYMBOL SYMBOL Reset Timing (See Figure 3) t RESETN pulse width RES Bus Timing (See Figures A1-A4 setup time ...
Page 8
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) BLOCK DIAGRAM The SCN68681 DUART consists of the following eight major sections: data bus buffer, operation control, interrupt control, timing, communications Channels A and B, input port and output port. Refer to the Block ...
Page 9
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) of the Output Port Register (OPR). OPR[ results in OP[n] = Low and vice versa. Bits of the OPR can be individually set and reset. A bit is set by performing a ...
Page 10
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) The receiver can control the deactivation of RTS. If programmed to operate in this mode, the RTSN output will be negated when a valid start bit was received and the FIFO is full. When ...
Page 11
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats BIT 7 BIT 6 RxRTS RxINT CONTROL SELECT MR1A MR1A MR1B RxRDY 1 = Yes 1 = FFULL NOTE: *In block error mode, block ...
Page 12
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats (Continued) BIT 7 BIT 6 BRG SET ACR SELECT MODE AND SOURCE 0 = set set 2 BIT 7 BIT 6 DELTA DELTA IPCR IP3 IP2 ...
Page 13
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) MR1A[1:0] – Channel A Bits Per Character Select This field selects the number of data bits per character to be transmitted and received. The character length does not include the start, parity, and stop ...
Page 14
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART external 1X clock is used for the transmitter, MR2A[ selects one stop bit and MR2A[ selects two stop bits to be transmitted. MR1B – Channel B Mode Register ...
Page 15
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) on the receiver status bits or any other control registers. If the special multidrop mode is programmed, the receiver operates even disabled. See Operation section. CRA[0] – Enable Channel A Receiver ...
Page 16
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 1: The Channel A receiver interrupt output which is the complement of ISR[1]. When in this mode OP4 acts as an open-drain output. Note that this output is not masked by the contents of ...
Page 17
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) IPCR[3:0] – IP3, IP2, IP1, IP0 Current State These bits provide the current state of the respective inputs. The information is unlatched and reflects the state of the input pins at the time the ...
Page 18
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) In the counter mode, the C/T counts down the number of pulses loaded into CTUR and CTLR by the CPU. Counting begins upon receipt of a start counter command. Upon reaching terminal count 0000 ...
Page 19
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) RESETN t RES Figure 3. Reset Timing X1/CLK A1–A4 RWN CSN D0–D7 DTACKN X1/CLK A1–A4 RWN CSN D0–D7 DTACKN NOTE: DACKN requires two rising edges of X1 clock after CEN is low. 1998 Sep ...
Page 20
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) X1/CLK INTRN IACKN D0–D7 DTACKN CSN IP0–IP5 CSN OP0–OP7 RxC (1X INPUT) RxD 1998 Sep 04 t CSC CSD t DAL t t DCR DAH t DAT Figure 6. Interrupt Cycle ...
Page 21
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) t CLK t CTC X1/CLK CTCLK RxC TxC t CLK t CTC When using an external clock it is preferred to drive X2 and leave X1 ...
Page 22
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) RxC (1X INPUT) RxD TxD D1 TRANSMITTER ENABLED TxRDY (SR2) CSN (WRITE CTSN (IP0) 2 RTSN (OP0) OPR( NOTES: 1. Timing shown for MR2( Timing shown ...
Page 23
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) MASTER STATION ADD#1 TxD TRANSMITTER ENABLED TxRDY (SR2) CSN (WRITE) MR1(4+ ADD#1 MR1( MR1( PERIPHERAL STATION BIT 9 0 ADD#1 1 RxD RECEIVER ENABLED RxRDY (SR0) CSN ...
Page 24
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 16x mode or one bit time in the 1x mode. Also, if the transmitter, while in the enabled state and underrun condition, is immediately disabled after a single character is loaded to the transmit ...
Page 25
E – PIN # 1 0.100 (2.54) BSC 2.087 (53.01) – D – 2.038 (51.77) 0.070 (1.78) 0.050 (1.27) – T – SEATING PLANE 0.023 (0.58 0.010 (0.254) 0.015 (0.38) NOTES: 0.098 ...
Page 26
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP40: plastic dual in-line package; 40 leads (600 mil) 1998 Sep 04 26 Product specification SCN68681 SOT129-1 ...
Page 27
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PLCC44: plastic leaded chip carrier; 44 leads 1998 Sep 04 27 Product specification SCN68681 SOT187-2 ...
Page 28
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Data sheet status Data sheet Product Definition status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary ...