IDT72V8980PVG8 IDT, Integrated Device Technology Inc, IDT72V8980PVG8 Datasheet - Page 9
![IC DGTL SW 256X256 48-SSOP](/photos/31/26/312666/57648ssop_sml.jpg)
IDT72V8980PVG8
Manufacturer Part Number
IDT72V8980PVG8
Description
IC DGTL SW 256X256 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Type
Multiplexerr
Datasheet
1.IDT72V8980JG.pdf
(11 pages)
Specifications of IDT72V8980PVG8
Circuit
1 x 8:8
Independent Circuits
1
Voltage Supply Source
Single Supply
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Compliant
Other names
72V8980PVG8
AC ELECTRICAL CHARACTERISTICS
NOTE:
1. Timing is over recommended temperature and power supply voltages.
2. Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
3. High Impedance is measured by pulling to the appropriate rail with R
IDT72V8980 3.3V Time Slot Interchange
Digital Switch 256 x 256
Symbol
TX0-7
TX0-7
TX0-7
t
CCO
t
t
t
t
t
t
t
t
t
t
TOH
OED
t
t
ZDO
RPW
TAZ
TZA
TAA
XCH
XCD
RSZ
ZRS
SIS
SIH
C4i
Figure 7. Serial Outputs and External Control
Characteristics
TX0-7 Delay - Active to High Z
TX0-7 Delay - High Z to Active
TX0-7 Delay - Active to Active
TX0-7 Hold Time
Output Driver Enable Delay
External Control Hold Time
External Control Delay
Serial Input Setup Time
Serial Input Hold Time
Reset to High Z
High Z to Reset
High Z to Valid Data
Reset Pulse Width
Bit Cell Boundary
t
TOH
t
t
t
TOH
XCH
TZA
t
t
TAA
XCD
t
TAZ
5705 drw11
Min.
100
20
10
10
5
5
0
L
, with timing corrected to cancel time taken to discharge C
(1)
9
Typ.
SERIAL STREAM TIMING
30
45
40
45
45
50
15
20
20
30
32
(2)
RX0-7
RS
TX
TX0-7
ODE
C4i
t
RSZ
Max.
45
60
60
60
30
Figure 8. Output Driver Enable
Bit Cell Boundaries
Figure 9. Serial Inputs
t
RPW
Figure 10. Reset
t
t
OED
ZRS
cycles
t
Unit
Commercial Temperature Range
SIS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
L
.
t
ZDO
R
R
R
L
L
L
= 1KΩ
= 1KΩ
= 1KΩ
Test Conditions
t
OED
t
SIH
C
C
C
C
C
C4i cycles
L
L
L
L
L
= 150pF
= 150pF
= 150pF
= 150pF
= 150pF
(3)
(3)
(3)
, C
, C
, C
5705 drw12
5705 drw13
L
L
L
= 150pF
= 150pF
= 150pF
5705 drw14