SX1210 SEMTECH [Semtech Corporation], SX1210 Datasheet - Page 29

• Manufacturer Part Number: SX1210
• Description: Ultra-Low Power Integrated UHF Receiver
• Manufacturer: SEMTECH [Semtech Corporation]

Table 12: Data Operation Mode Selection
Each of these data operation modes is described fully in the following sections.
As illustrated in the Figure 20 below, the SX1210’s SPI interface consists of two sub blocks:
Both interfaces are configured in slave mode whilst the uC is configured as the master. They have separate
selection pins (NSS_CONFIG and NSS_DATA) but share the remaining pins:
As described below, only one interface can be selected at a time with NSS_CONFIG having the priority:
Rev 2– Sept 8
ADVANCED COMMUNICATIONS & SENSING
5.2. Control Block Description
SPI Config: used in all data operation modes to read and write the configuration registers which control all the
parameters of the chip (operating mode, bit rate, etc...)
SPI Data: used in Buffered and Packet mode to read data bytes from the FIFO. (FIFO interrupts can be used to
manage the FIFO content.)
SCK (SPI Clock): clock signal provided by the uC
MOSI (Master Out Slave In): data input signal provided by the uC
MISO (Master In Slave Out): data output signal provided by the SX1210
MCParam_Data_mode
5.2.1. SPI Interface
Registers
Registers
th
Config.
Config.
FIFO
, 2008
00
01
1x
5.2.1.1. Overview
SX1210
Data Operation Mode
Figure 20: SPI Interface Overview and uC Connections
Continuous
Buffered
Packet
CONFIG
(slave)
DATA
(slave)
SPI
SPI
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NSS_CONFIG
MOSI
MISO
SCK
NSS_DATA
NSS_DATA
MOSI
MISO
SCK
NSS_CONFIG
(master)
µ C
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SX1210