9DBL411B IDT [Integrated Device Technology], 9DBL411B Datasheet - Page 4

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9DBL411B

Manufacturer Part Number
9DBL411B
Description
Four Output Low Power Differential Fanout Buffer for PCI Express Gen1, Gen2, and QPI
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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Part Number:
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MLF Pin Description
IDT
9DBL411B
Four Output Low Power Differential Buffer for PCI Express Gen1, Gen2, and QPI
(MLF)
PIN #
®
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Four Output Low Power Differential Buffer for PCI Express for Gen1, Gen2, and QPI
VDDA
GNDA
OE3#
DIF3C_LPR
DIF3T_LPR
VDD_IO
GND
DIF2C_LPR
DIF2T_LPR
OE2#
DIF1C_LPR
DIF1T_LPR
OE1#
GND
VDD_IO
DIF0C_LPR
DIF0T_LPR
OE0#
DIF_INC
DIF_INT
PIN NAME
PIN TYPE
PWR
PWR
PWR
GND
GND
GND
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
3.3V Power for the Analog Core
Ground for the Analog Core
Output Enable for DIF3 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
Power supply for low power differential outputs, nominal 1.05V to 3.3V
Ground pin
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
Output Enable for DIF2 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
Output Enable for DIF1 output. Control is as follows:
0 = enabled, 1 = Low-Low
Ground pin
Power supply for low power differential outputs, nominal 1.05V to 3.3V
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
Output Enable for DIF0 output. Control is as follows:
0 = enabled, 1 = Low-Low
Complement side of differential input clock
True side of differential input clock
4
DESCRIPTION
Advance Information
1645C—10/18/10

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