ZL50235GD ZARLINK [Zarlink Semiconductor Inc], ZL50235GD Datasheet - Page 12
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ZL50235GD
Manufacturer Part Number
ZL50235GD
Description
16 Channel Voice Echo Canceller
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50235GD.pdf
(39 pages)
12
2.0
The ZL50235 architecture contains 16 echo cancellers divided into 8 groups. Each group has two echo cancellers
which can be individually controlled (Echo Canceller A (ECA) and Echo Canceller B (ECB)). They can be set in
three distinct configurations: Normal, Back-to-Back, and Extended Delay. See Figures 6, 7, and 8.
2.1
In Normal configuration, the two echo cancellers (Echo Canceller A and B) are positioned in parallel, as shown in
Figure 6, providing 64 milliseconds of echo cancellation in two channels simultaneously.
2.2
In Back-to-Back configuration, the two echo cancellers from the same group are positioned to cancel echo coming
from both directions in a single channel providing full-duplex 64ms echo cancellation. See Figure 7. This
configuration uses only one timeslot on PORT1 and PORT2 and the second timeslot normally associated with ECB
contains zero code. Back-to-Back configuration allows a no-glue interface for applications where bidirectional echo
cancellation is required.
ZL50235
Normal Configuration
Back-to-Back Configuration
Device Configuration
Figure 7 - Back-to-Back Device Configuration (64ms)
PORT2
echo
path B
Rout
echo
path A
Sin
PORT2
Figure 6 - Normal Device Configuration (64ms)
Rout
echo
path
Sin
ECA
Filter (64ms)
channel B
channel A
channel B
channel A
Adaptive
ECA
ECB
-
Zarlink Semiconductor Inc.
+
Filter (64ms)
Filter (64ms)
Adaptive
Adaptive
-
-
+
+
Filter (64ms)
Adaptive
ECB
+
-
echo
path
PORT1
Sout
Rin
PORT1
Sout
Rin
Data Sheet