ZL50234GDC ZARLINK [Zarlink Semiconductor Inc], ZL50234GDC Datasheet - Page 24

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ZL50234GDC

Manufacturer Part Number
ZL50234GDC
Description
8 Channel Voice Echo Canceller
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
24
ZL50234
Reserve
NLRun2
NLRun2
NLRun1
PathDet
NLPSel
RingClr
PathClr
InjCtrl
Bit 7
Power-up
FB
hex
noise. When low, the noise level estimator makes no such distinction.
Selects which noise ramping scheme is used. See Table below.
When high, the comfort noise level estimator actively rejects uncancelled echo as being
background noise. When low, the noise level estimator makes no such distinction.
When high, the instability detector is activated. When low, the instability detector is disabled.
Reserved bit. Must always be set to one for normal operation.
fast convergence mode upon detection of a path change. When low, the echo canceller will keep
the current path estimate but revert to fast convergence mode upon detection of a path change.
Note: this bit is ignored if PathDet is low.
disabled.
on page 9
When high, the comfort noise level estimator actively rejects double-talk as being background
When high, the current echo channel estimate will be cleared and the echo canceller will enter
When high, the path change detector is activated. When low, the path change detector is
When high, the Advanced NLP is selected. When low, the original NLP is selected. See Table 1
InjCtrl
Bit 6
NLRun1
Bit 5
Functional Description of Register Bits
ECA: Control Register 3
ECB: Control Register 3
Zarlink Semiconductor Inc.
RingClr
Bit 4
Reserve
Bit 3
PathClr
Bit 2
08
28
PathDet
Bit 1
hex
hex
R/W Address:
R/W Address:
+ Base Address
+ Base Address
Data Sheet
NLPSel
Bit 0

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