AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 48
AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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Target Initiated Termination
When the PCnet-PCI II controller is a bus master, the
cycles it produces on the PCI bus may be terminated by
the target in one of three different ways.
Disconnect With Data Transfer
The figure below shows a disconnection in which one
last data transfer occurs after the target asserted STOP.
STOP is asserted on clock 4 to start the termination
48
AMD
DEVSEL
FRAME
TRDY
STOP
C/BE
IRDY
REQ
GNT
CLK
PAR
AD
1
DEVSEL is sampled
ADDR i
0111
2
Figure 17. Disconnect With Data Transfer
DATA
PAR
3
0000
DATA
P R E L I M I N A R Y
4
PAR
Am79C970A
5
sequence. Data is still transferred during this
cycle, since both IRDY and TRDY are asserted. The
PCnet-PCI II controller terminates the current transfer
with the deassertion of FRAME on clock 5 and of IRDY
one clock later. It finally releases the bus on clock 6. The
PCnet-PCI II controller will re-request the bus after 2
clock cycles, if it wants to transfer more data. The start-
ing address of the new transfer will be the address of the
next untransferred data.
6
7
8
9
ADDR i +8
0111
10
19436A-20
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