AM79C940KCW AMD [Advanced Micro Devices], AM79C940KCW Datasheet - Page 105
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AM79C940KCW
Manufacturer Part Number
AM79C940KCW
Description
Media Access Controller for Ethernet (MACE)
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C940KCW.pdf
(122 pages)
- Current page: 105 of 122
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AMD
57
40 mV
DO±
0 V
100 mV Max
80 Bit Times Max
16235C-34
AUI Transmit Timing—End Transmit Delimiter (ETD)
Bit Cell 1
Bit Cell 2
Bit Cell 3
Bit Cell 4
Bit Cell 5
1
0
1
0
1
0
(Note 1)
59
60
DI±
V ASQ
BCC
BCB
BCC
BCB
BCC
BCC
BCB
BCC
BCB
RXCRS
IVCO_ENABLE
IVCO
SRDCLK
5 Bit Times Max
SRD
(Note 2)
(Note 3)
16235C-35
Notes:
1. Minimum pulse width >45 ns with amplitude > –160 mV.
2. SRD first decoded bit might not be defined until bit time 5.
3. First valid data bit.
4. IVCO and VCO ENABLE are internal signals shown for clarification only.
AUI Receive Timing—Start of Packet
Am79C940
105
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