ZL50022GAC ZARLINK [Zarlink Semiconductor Inc], ZL50022GAC Datasheet - Page 73
ZL50022GAC
Manufacturer Part Number
ZL50022GAC
Description
Enhanced 4 K Digital Switch with Stratum 4E DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50022GAC.pdf
(121 pages)
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External Read/Write Address: 0067
Reset Value: 000F
External Read/Write Address: 0068
Reset Value: 0000
15 - 4
15
3 - 1
0
Bit
Bit
0
15
0
0
14
0
14
0
Unused
Name
ICB3 - 1
Unused
Unused
Name
H
13
0
H
13
0
Reserved
In normal functional mode, this bit MUST be set to one.
12
Table 39 - Interrupt Mask Register (IMR) Bits (continued)
0
12
0
Reserved
In normal functional mode, these bits MUST be set to zero.
Interrupt Clear Bits
Writing a “1” to any bit in this register will clear the corresponding bit in the Interrupt
Register (IR). The Interrupt Clear Register is self-clearing, i.e. once it has completed
its action, the ICR register bit returns to 0.
Reserved
In normal functional mode, this bit MUST be set to one.
H
11
0
H
11
Table 40 - Interrupt Clear Register (ICR) Bits
0
10
0
10
0
9
0
Zarlink Semiconductor Inc.
9
0
ZL50022
8
0
8
0
73
7
0
7
0
Description
Description
6
0
6
0
5
0
5
0
4
0
4
0
LIM
3
ICB
3
3
RIM
2
ICB
2
2
HIM
1
ICB
Data Sheet
1
1
0
1
0
1
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