ZL50015 ZARLINK [Zarlink Semiconductor Inc], ZL50015 Datasheet - Page 91

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ZL50015

Manufacturer Part Number
ZL50015
Description
Enhanced 1 K Digital Switch with Stratum 4E DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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The crystal should be a fundamental mode type - not an overtone. The fundamental mode crystal permits a simpler
oscillator circuit with no additional filter components and is less likely to generate spurious responses. The crystal
accuracy only affects the output clock accuracy in the freerun or the holdover mode. The crystal specification is as
follows:
25.1.2
When an external clock oscillator is used, numerous parameters must be considered. They include absolute
frequency, frequency change over temperature, output rise and fall times, output levels and duty cycle.
The output clock should be connected directly (not AC coupled) to the OSCi input of the device, and the OSCo
output should be left open as shown in Figure 24 on page 91. XC is a buffered version of the 20 MHz input clock
connected to the internal circuitry.
For applications requiring ±32 ppm clock accuracy, the following requirements should be met.
Frequency
Tolerance
Oscillation Mode
Resonance Mode
Load Capacitance
Maximum Series Resistance
Approximate Drive Level
Frequency
Tolerance
Rise and Fall Time
Duty Cycle
External Clock Oscillator
XC
1K DX
Figure 24 - Clock Oscillator Circuit
20 MHz
As required
Fundamental
Parallel
20 pF - 32 pF
35 Ω
1 mW
Zarlink Semiconductor Inc.
20.000 MHz
±32 ppm
10 ns
40% to 60%
ZL50015
OSCo
OSCi
No Connection
91
20 MHz OUT
+3.3 V
+3.3V
GND
0.1 uF
Data Sheet

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