ZL50015 ZARLINK [Zarlink Semiconductor Inc], ZL50015 Datasheet - Page 15

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ZL50015

Manufacturer Part Number
ZL50015
Description
Enhanced 1 K Digital Switch with Stratum 4E DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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A8, A9, A14,
R16, T6, T7,
F16, E1, D1,
T8, T9, T10,
M2, N2, P2,
M1, P1, R1,
G1, F1, J1,
H1, K1, L1,
A7, A5, A6,
A4, A3, A2,
T2, T3, T5,
PBGA Pin
A15, E10,
T15, D16,
E16, C16,
B16, A13,
A12, A10,
M16, L16,
K16, H16,
J16, G16,
M14, R13
T13, T14,
T11, T12,
P16, R2,
Number
A11, N1,
T4, N16,
C1, B1
D12
LQFP Pin
140, 215,
134, 135,
136, 137,
138, 139,
219, 225,
229, 236,
237, 125,
126, 127,
128, 129,
130, 131,
132, 253,
254, 255,
256, 1, 2,
120, 122,
124, 243,
244, 245,
246, 247,
248, 250,
252, 189,
190, 191,
192, 193,
194, 196,
Number
3, 4, 75,
78, 119,
61, 62,
63, 64,
65, 66,
67, 68,
76, 77,
46, 48
197
107
MODE_4M0,
MODE_4M1
Pin Name
OSC_EN
NC
Zarlink Semiconductor Inc.
No Connect
These pins MUST be left unconnected.
4 M Input Clock Mode 0 to 1 (5 V-Tolerant Input with internal
pull-down) These two pins should be tied together and are
typically used to select CKi = 4.096 MHz operation. See Table 7,
“ZL50015 Operating Modes” on page 37 for a detailed explanation.
See Table 17, “Control Register (CR) Bits” on page 53 for CKi and
FPi selection using the CKIN1 - 0 bits.
Oscillator Enable (5 V-Tolerant Input with Internal Pull-down) If
tied high, this pin indicates that there is a 20 MHz external
oscillator interfacing with the device. If tied low, there is no
oscillator and CKi will be used for master clock generation.
If the device is in master mode, an external oscillator is required
and this pin MUST be tied high.
ZL50015
15
Description
Data Sheet

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