ZL30414QGC ZARLINK [Zarlink Semiconductor Inc], ZL30414QGC Datasheet - Page 4

• Manufacturer Part Number: ZL30414QGC
• Description: SONET/SDH Clock Multiplier PLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Pin Description Table (continued)
Pin #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
C622oN-D
C622oN-C
C622oP-D
C622oP-C
C622oN-B
C622oP-B
Name
LOCK
C19o
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VDD
VDD
VCC
VDD
VCC
VCC
VCC
VCC
NC
Ground. 0 volt
Positive Digital Power Supply. +3.3 V ±10%
C19 Clock Output (CMOS Output). This pin provides a single-ended CMOS
clock at 19.44 MHz.
Ground. 0 volt
Lock Indicator (CMOS Output). This output goes high when PLL is frequency
locked to the input reference C19i.
Ground. 0 volt
Ground. 0 volt
No internal bonding Connection. Leave unconnected.
Ground. 0 volt
Positive Digital Power Supply. +3.3 V ±10%
Ground. 0 volt
Positive Analog Power Supply. +3.3 V ±10%
Ground. 0 volt
Positive Digital Power Supply. +3.3 V ±10%
Positive Analog Power Supply. +3.3 V ±10%
Ground. 0 volt
Positive Analog Power Supply. +3.3 V ±10%.
C622 Clock Output (LVPECL). These outputs provide a differential LVPECL
clock at 622.08 MHz. Unused LVPECL port should be left unterminated to
decrease supply current.
Ground. 0 volt
Positive Analog Power Supply. +3.3 V ±10%.
C622 Clock Output (LVPECL). These outputs provide a differential LVPECL
clock at 622.08 MHz. Unused LVPECL port should be left unterminated to
decrease supply current.
Ground. 0 volt
Positive Analog Power Supply. +3.3 V ±10%.
C622 Clock Output (LVPECL). These outputs provide a differential LVPECL
clock at 622.08 MHz. Unused LVPECL port should be left unterminated to
decrease supply current.
Zarlink Semiconductor Inc.
ZL30414
4
Description
Data Sheet