ZL30106_05 ZARLINK [Zarlink Semiconductor Inc], ZL30106_05 Datasheet - Page 26

• Manufacturer Part Number: ZL30106_05
• Description: SONET/SDH/PDH Network Interface DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

4.5.2.2
When the currently-active input reference in Automatic mode fails through a subtle frequency offset, the REF_FAIL
output is asserted as soon as the Precise Frequency Monitor indicates an out-of-range reference (10 to 20
seconds). The HOLDOVER output is briefly asserted (approximately three reference input cycles) and the
REF_SEL outputs indicate that the device has switched to the other reference. Where the new reference is close
enough in frequency and TIE-corrected phase for the output to stay within the phase-lock-window, the LOCK output
will remain asserted through the reference-switch process. Where the new reference has enough frequency offset
and/or TIE-corrected phase offset to force the output outside the phase-lock-window, the LOCK output will de-
assert, the lock-qualify timer is reset, and LOCK will stay de-asserted for the full lock-time duration. Figure 17
illustrates this process.
REF0
REF_DIS0
(internal signal)
REF_OOR0
(internal signal)
REF_FAIL0
HOLDOVER
REF_SEL
LOCK
Automatic Reference Switching - Reference Frequency Out-of-Range
Note: This scenario is based on REF1 remaining good throughout the duration.
LOCK pin behaviour depends on phase and frequency offset of REF1.
Figure 16 - Automatic Reference Switching - Coarse Reference Failure
REF0
SCM or CFM failure
50 ms
REF1
Zarlink Semiconductor Inc.
Lock Time
10 s
ZL30106
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Data Sheet