ZL30106_05 ZARLINK [Zarlink Semiconductor Inc], ZL30106_05 Datasheet - Page 14

• Manufacturer Part Number: ZL30106_05
• Description: SONET/SDH/PDH Network Interface DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

In addition to the monitoring of the REF reference signals the companion REF_SYNC input signals are also
monitored for failure (see Figure 8).
C20: 20 MHz master oscillator clock
C20: 20 MHz master oscillator clock
•
•
REF_SYNC Frequency Detector (RSFD): This detector determines whether the frequency of the
REF_SYNC frame pulse is 2 kHz or 8 kHz and provides this information to the REF/SYNC ratio monitor
circuits and the phase detector circuit of the DPLL.
REF_SYNC Ratio Monitor (RSRM): This monitor checks the number of REF reference clock cycles in a
single associated REF_SYNC frame pulse period to determine the integrity of the REF_SYNC signal, for
example there must be exactly 256 clock cycles of a 2.048 MHz REF reference clock in a single 8 kHz
REF_SYNC frame pulse period to validate the REF_SYNC signal. If the REF and REF_SYNC inputs are
selected for synchronization and the Sync Ratio Monitor detects a failure, the DPLL will abandon the
mechanism of aligning the output frame pulse to the REF_SYNC pulse. Instead only the REF reference
will be used for synchronization.
+20 ppm
-20 ppm
C20i Clock Accuracy
0 ppm
C20i Clock
Figure 7 - Out-of-Range Thresholds for APP_SEL1:0=10 or APP_SEL1:0=11
+4.6 ppm
-4.6 ppm
0 ppm
Accuracy
-100
Figure 6 - Out-of-Range Thresholds for APP_SEL1:0=01
-16.6
-75
-15
-72
-13.8
-12
-60
-52
-10
-50
-9.2
-40
-7.4
-32
Zarlink Semiconductor Inc.
C20
-4.6
C20
-4.6
-20
-5
-25
-20
ZL30106
C20
C20
0
0
0
0
14
20
C20
C20
4.6
4.6
20
5
25
32
7.4
40
9.2
10
50
52
12
60
13.8
72
15
75
16.6
100
Frequency offset [ppm]
Out of Range
In Range
Out of Range
In Range
Out of Range
In Range
In Range
In Range
Out of Range
In Range
Frequency offset [ppm]
Out of Range
Out of Range
Data Sheet
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