92HD71B5 IDT [Integrated Device Technology], 92HD71B5 Datasheet - Page 17
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92HD71B5
Manufacturer Part Number
92HD71B5
Description
4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.92HD71B5.pdf
(216 pages)
- Current page: 17 of 216
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IDT™ CONFIDENTIAL AND PROPRIETARY
4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER
92HD71B7
4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER
ADC0.CnvrtID.Channel = 0
ADC1.CnvrtID.Channel = 2
ADC0.CnvrtID.Channel = 2
ADC1.CnvrtID.Channel = 0
BITCLK
1.4.12. EAPD
SDI
stream id “Strm= N” to both ADC0 and ADC1. The sample rates must be set the same and the num-
ber of channels must be set to 4 channels “NmbrChan = 0011”.
The following figure describes the bus waveform for a 24-bit, 48KHz capture stream with ID set to 1.
The EAPD pin (pin 47) also supports SPDIF and GPIO functions. The pin defaults to EAPD after
power on reset and will remain in EAPD mode until either GPIO is enabled for pin 47 or the port I/O
is enabled to support SPDIF. The EAPD value is reflected on the EAPD pin; a 1 causes the external
amplifier to power up, and a 0 causes it to power down. When the EAPD value = 1, the EAPD pin
must be placed in a state appropriate to the current power state of the associated Pin Widget even
though the EAPD value may remain 1. The default state of this pin is 0 (driving low) and a Pull-down
prevents the line from floating high when the part is in reset.
ADC1 CnvtrID
ADC0 CnvtrID
0
STREAM ID
0
0
Stream ID
Stream ID
1
STREAM TAG
0
Table 6: Example channel mapping
Figure 4. Multi-channel timing diagram
Length
Length
Data
Data
0
Figure 3. Multi-channel capture
DATA LENGTH
1
1
(NID = 0x08)
[3:0]
(NID = 0x07)
[3:0]
Left Channel
Left Channel
ADC0
ADC1
0
0
17
ADC0
L23
Right Channel
Right Channel
LEFT
ADC0
ADC1
ADC0
L0
ADC0
Ch = 2
Ch=0
ADC0
R23
RIGHT
Left Channel
Left Channel
DATA BLOCK
ADC0
R0
ADC1
ADC0
ADC1
92HD71B7
L23
LEFT
ADC1
Right Channel
Right Channel
L0
ADC1
ADC1
ADC0
ADC1
R23
RIGHT
ADC1
R0
Null PAD
Null PAD
PC AUDIO
V 0.9 07/07
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