92HD66C IDT [Integrated Device Technology], 92HD66C Datasheet - Page 15

• Manufacturer Part Number: 92HD66C
• Description: SIX CHANNEL HD AUDIO CODECS
• Manufacturer: IDT [Integrated Device Technology]

92HD66C
SIX CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
IDT CONFIDENTIAL
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
2.6.
2.7.
SPDIF Input
Converter widget rate does not
with a word length greater than
Mono Output
Converter widget programmed
Converter widget programmed
for a word length less than the
word length provided by the
the word length provided by
equal the stream rate
the input stream.
1.
input stream
Conflict
SPDIF IN can operate at 44.1 KHz, 48 KHz, or 96 KHz, and implements internal Jack Sensing (Port
presence Detect).
A sophisticated digital PLL allows automatic rate detection and accurate data recovery. The ability to
directly accept consumer SPDIF voltage levels eliminates the need for costly external receiver ICs.
Status flags from the input stream are updated only after the entire valid block has been received (or
at least when all bits of a particular status flag have been received) to ensure that software does not
read an invalid mixture of old and new data.
In general, the SPDIF input block does not alter the data received. However, it is sometimes neces-
sary to alter the data when the converter widget settings do not match the stream format. The follow-
ing table outlines a few cases and the expected behavior.
Port presence detect for SPDIF_IN operates differently from other ports. Once the PLL has locked
and valid framing (no errors) has been detected, then the port presence detect bit is set. In D3, and
D3 without a clock, it is not possible to check for proper framing. Monitoring of activity (rising and fall-
ing edges) is sufficient to verify a change in connectivity in D3. If no clock is present, then the internal
oscillator is used until a clock is restored. When the HD Audio bus is in a low power state (reset
asserted and clock stopped) the CODEC will generate a Power State Change Request when a
change in SPDIF_IN port connectivity is sensed and then generate an unsolicited response after the
HD Audio link has been brought out of a low power state and the device has been enumerated. Per
HDA015-B, this will take less than 10mS.
The Mono Out port source selection, power state, and mute characteristics are all independently
controlled by the mono output port controls. The mono output pin is not available on the 40-pin
package options.
Rounding may be disabled by setting the disable bit (AFG vendor specific verb -see widget list) or setting the
SPDIF_IN converter widget Frmt StrmType field to 1 (non-PCM)
word length. If LPCM data is indicated in the
word length will be handled as described as
Although the SPDIF input block is designed
If the input stream indicates non PCM data,
to handle inputs slightly above or below the
input stream to the HD Audio bus interface.
the data will be truncated to the requested
Regardless of content, 24 bits per channel
the input rate is much higher than the rate
of data will be transferred from the SPDIF
above. Any non-zero data in the incoming
programmed rate, samples may be lost if
Truncation or rounding to the requested
input stream, the CODEC will round the
programmed into the converter widget.
received data to the requested length.
stream will cause problems.
Table 7. SPDIF Behavior
Behavior
15
1
Program the converter widget with the word
Program the converter widget with the word
same rate as indicated by the input stream.
Although not recommended, application or
driver software may program the converter
indicated by the input stream, then right
extend the data using 0s to the desired
Program the converter widget with the
truncate the input to the word length
length indicated in the input stream.
length indicated in the input stream.
widget with a word length of 24 bits,
word length.
Resolution
V 1.0 2/12
92HD66C