92HD66B IDT [Integrated Device Technology], 92HD66B Datasheet - Page 64
92HD66B
Manufacturer Part Number
92HD66B
Description
FOUR CHANNEL HD AUDIO CODECS
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.92HD66B.pdf
(286 pages)
- Current page: 64 of 286
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92HD66B
FOUR CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Mask4
Mask3
Mask2
Mask1
Mask0
Field Name
Rsvd
Control4
Control3
Reg
Get
Set
6.7.13. AFG (NID = 01h): GPIODir
Byte 4 (Bits 31:24)
Bits
4
Enable for GPIO4: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control (Available only on 48-pin versions)
3
Enable for GPIO3: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
2
Enable for GPIO2: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
1
Enable for GPIO1: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
0
Enable for GPIO0: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Bits
31:5
Reserved.
4
Direction control for GPIO4: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output (Available only on 48-pin versions)
3
Direction control for GPIO3: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output
Byte 3 (Bits 23:16)
R/W
RW
RW
RW
RW
RW
R/W
R
RW
RW
F1700h
Default
0h
0h
0h
0h
0h
Default
00000000h
0h
0h
64
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
Byte 1 (Bits 7:0)
717h
V 1.0 2/12
92HD66B
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