73K302L TDK [TDK Electronics], 73K302L Datasheet - Page 11

• Manufacturer Part Number: 73K302L
• Description: Single-Chip Modem
• Manufacturer: TDK [TDK Electronics]

CONTROL REGISTER 1
BIT NO.
D3
D4*
D5
D7, D6
* D4 should always be set to 1 when receiving 1200 bit/s data and to 0 when transmitting 1200 bit/s data in 202
mode.
CR1
001
TRANSMIT
PATTERN
D7
1
CLK Control
Equalization
Scrambler/
Add Phase
Transmit
Bypass
Pattern
Enable
NAME
Detect
TRANSMIT
PATTERN
(continued)
D6
0
CONDITION
DETECT
ENABLE
INTER.
D7
0
0
1
1
D5
0
1
0
1
0
1
D6
0
1
0
1
SCRAMB/
BYPASS
PH. EQ.
ADD
D4
11
DESCRIPTION
Selects 11.0592 MHz crystal echo output at CLK pin.
Selects 16 times the data rate, output at CLK pin in DPSK
modes only.
Selects normal operation. DPSK data is passed through
scrambler.
Selects Scrambler Bypass. DPSK data is routed around
scrambler in the transmit path. In Bell 202 mode,
additional phase equalization is added to the main
channel filters when D4 is set to 1.
Disables interrupt at INT pin.
Enables INT output. An interrupt will be generated with a
change in status of DR bits D1-D4. The special tone and
call progress detect interrupts are masked when the TX
enable bit is set. Carrier detect is masked when TX DTMF
is activated. All interrupts will be disabled if the device is
in power down mode.
Selects normal data transmission as controlled by the
state of the TXD pin.
Selects an alternating mark/space transmit pattern for
modem testing.
Selects a constant mark transmit pattern.
Selects a constant space transmit pattern.
CONTROL
CLK
D3
RESET
Single-Chip Modem
Bell 212A, 103, 202
D2
MODE
TEST
D1
1
MODE
TEST
D0
0