73K302L TDK [TDK Electronics], 73K302L Datasheet - Page 3

• Manufacturer Part Number: 73K302L
• Description: Single-Chip Modem
• Manufacturer: TDK [TDK Electronics]

signal eventually decoded into di-bits and converted
back to a serial bit stream. The demodulator also
recovers the clock which was encoded into the
analog signal during modulation. Demodulation
occurs using either a 1200 Hz carrier (answer mode
or ALB originate mode) or a 2400 Hz carrier
(originate mode or ALB answer mode). The
73K302L uses a phase locked loop coherent
demodulation
performance.
FSK MODULATOR/DEMODULATOR
The
modulated analog output signal using two discrete
frequencies to represent the binary data. Bell 103
mode uses 1270 and 1070 Hz (originate, mark and
space) or 2225 and 2025 Hz (answer, mark and
space). Bell 202 mode uses 1200 Hz (mark) and
2200 Hz (space for the main channel and 387 Hz
(mark) and 487 Hz (space) for the back channel.
The modulation rate of the back channel is up to 150
baud. Demodulation involves detecting the received
frequencies and decoding them into the appropriate
binary
scrambler/descrambler are automatically bypassed
in the 103 or 202 modes.
PASSBAND FILTERS AND EQUALIZERS
High and low band filters are included to shape the
amplitude and phase response of the transmit and
receive signals and provide compromise delay
equalization and rejection of out-of-band signals in
the
equalization are necessary to compensate for
distortion of the transmission line and to reduce
intersymbol interference in the bandlimited receive
signal. The transmit signal filtering approximates a
75% square root of raised Cosine frequency
response characteristic.
AGC
The automatic gain control maintains a signal level
at the input to the demodulators which is constant to
within 1 dB. It corrects quickly for increases in signal
which would cause clipping and provides a total
receiver dynamic range of >45 dB.
PARALLEL BUS INTERFACE
Four 8-bit registers are provided for control, option
select and status monitoring. These registers are
receive
FSK
value.
modulator
channel.
technique
The
produces
Amplitude
rate
for
optimum
converter
a
and
frequency
receiver
phase
and
3
addressed with the AD0, AD1, and AD2 multiplexed
address lines (latched by ALE) and appear to a
control microprocessor as four consecutive memory
locations. Two control registers and the tone register
are read/write memory. The detect register is read
only and cannot be modified except by modem
response to monitored parameters.
SERIAL COMMAND INTERFACE MODE
The serial command interface allows access to the
73K302L control and status registers via a serial
command port. In this mode the AD0, AD1 and AD2
lines provide register addresses for data passed
through the data pin under control of the RD and
WR lines. A read operation is initiated when the RD
line is taken low. The first bit is available after RD is
brought low and the next seven cycles of EXCLK will
then transfer out seven bits of the selected address
location LSB first. A write takes place by shifting in
eight bits of data LSB first for eight consecutive
cycles of EXCLK. WR is then pulsed low and data
transfer into the selected register occurs on the
rising edge of WR .
SPECIAL DETECT CIRCUITRY
The special detect circuitry monitors the received
analog signal to determine status or presence of
carrier, answer tone and weak received signal (long
loop condition), special tones such as FSK marking
and the 900 Hz soft carrier turn-off tone are also
detected. A highly frequency selective call progress
detector
accurately detect lower quality call progress signals.
DTMF GENERATOR
The DTMF generator will output one of 16 standard
tone pairs determined by a 4-bit binary value and TX
DTMF mode bit previously loaded into the tone
register. Tone generation is initiated when the DTMF
mode is selected using the tone register and the
transmit enable (CR0 bit D1) is changed from 0 to 1.
SOFT CARRIER TURN-OFF TONE GENERATOR
The soft carrier turn-off tone generator will output a
900 Hz tone.
channel transmit mode, the output signal will shift to
900 Hz, maintaining phase continuity during the
transition.
provides
When activated in Bell 202 main
Single-Chip Modem
Bell 212A, 103, 202
adequate
discrimination
to