73K302L TDK [TDK Electronics], 73K302L Datasheet - Page 21

• Manufacturer Part Number: 73K302L
• Description: Single-Chip Modem
• Manufacturer: TDK [TDK Electronics]

DYNAMIC CHARACTERISTICS AND TIMING PARALLEL CONTROL INTERFACE
PARAMETER
Timing (Refer to Timing Diagrams)
*
NOTE: Asserting ALE, CS , and RD or WR concurrently can cause unintentional register accesses. When using
Control for setup is the falling edge of RD or WR .
Control for hold is the falling edge of RD or the rising edge of WR .
TAL
TLA
TLC
TCL
TRD
TLL
TRDF
TRW
TWW
TDW
TWD
TWW
TRD
TRDF
TCKD
TCKW
TDCK
TAC
TCA
TWH
non-8031 compatible processors, care must be taken to prevent this from occurring when designing the
interface logic.
CONDITION
CS /ADDr. setup before ALE Low
CS /ADDr. hold after ALE Low
ALE Low to RD / WR Low
RD / WR Control to ALE High
Data out from RD Low
ALE width
Data float after RD High
RD width
WR width
Data setup before WR High
Data hold after WR High
WR width
Data out from RD Low
Data float after RD High
WR after EXCLK Low
Write data setup before EXCLK Low
Address setup before control*
Address hold after control*
Data hold after EXCLK
Data out after EXCLK Low
21
MIN
150
200
140
140
200
15
20
30
30
40
25
50
50
85
-5
Single-Chip Modem
Bell 212A, 103, 202
NOM
25000
MAX
140
140
200
90
50
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns