OR3T125 Agere Systems, OR3T125 Datasheet - Page 140
OR3T125
Manufacturer Part Number
OR3T125
Description
3C and 3T Field-Programmable Gate Arrays
Manufacturer
Agere Systems
Datasheet
1.OR3T125.pdf
(210 pages)
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ORCA Series 3C and 3T FPGAs
Timing Characteristics
Table 65. Slave Parallel Configuration Mode Timing Characteristics
OR3Cxx Commercial: V
OR3Txxx Commercial: V
Note: Daisy-chaining of FPGAs is not supported in this mode.
140
CS0
CS0
D[7:0] Setup Time:
D[7:0] Hold Time
CCLK High Time:
CCLK Low Time:
CCLK Frequency:
3Cxx
3Txxx
3Cxx
3Txxx
3Cxx
3Txxx
3Cxx
3Txxx
, CS1,
, CS1,
WR
WR
Parameter
D[7:0]
CCLK
CS0
CS1
WR
Setup Time
Hold Time
DD
DD
Figure 87. Slave Parallel Configuration Mode Timing Diagram
= 5.0 V ± 5%, 0 °C
= 3.0 V to 3.6 V, 0 °C
(continued)
T
CL
Symbol
T
<
S2
T
T
T
T
T
T
T
T
F
S1
<
CH
A
S1
H1
S2
H2
CL
C
<
T
A
70 °C; Industrial: V
<
70 °C; Industrial: V
T
H1
T
CH
T
H2
40.00
20.00
20.00
20.00
20.00
7.00
0.00
7.00
7.00
Min
—
—
DD
DD
= 5.0 V ± 10%, –40 °C
= 3.0 V to 3.6 V, –40 °C
25.00
66.00
Max
—
—
—
—
—
—
—
—
—
Lucent Technologies Inc.
<
T
A
<
<
T
+85 °C.
A
<
Data Sheet
June 1999
+85 °C.
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
5-2848(F)
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