AM29SL400C SPANSION [SPANSION], AM29SL400C Datasheet - Page 23

• Manufacturer Part Number: AM29SL400C
• Description: 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
• Manufacturer: SPANSION [SPANSION]

DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time
has exceeded a specified internal pulse count limit.
March 3, 2005
Notes:
1. Read toggle bit twice to determine whether or not it is
2. Recheck toggle bit because it may stop toggling as DQ5
toggling. See text.
changes to 1. See text.
No
Figure 6. Toggle Bit Algorithm
Reset Command
Complete, Write
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
Toggle Bit
Toggle Bit
DQ5 = 1?
= Toggle?
= Toggle?
START
Twice
Yes
Yes
Yes
(Notes
1, 2)
(Note 1)
Operation Complete
No
No
Program/Erase
A d v a n c e
I n f o r m a t i o n
Under these conditions DQ5 produces a 1. This is a
failure condition that indicates the program or erase
cycle was not successfully completed.
The DQ5 failure condition may appear if the system
tries to program a 1 to a location that is previously
programmed to “0.” Only an erase operation can
change a 0 back to a 1. Under this condition, the
device halts the operation, and when the operation
has exceeded the timing limits, DQ5 produces a 1.
Under both these conditions, the system must issue
the reset command to return the device to reading
array data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system may read DQ3 to determine whether or not
an erase operation has begun. (The sector erase
timer does not apply to the chip erase command.) If
additional sectors are selected for erasure, the entire
time-out also applies after each additional sector
erase command. When the time-out is complete,
DQ3 switches from 0 to 1. If the time between addi-
tional sector erase commands from the system can
be assumed to be less than 50 µs, the system need
not monitor DQ3. See also
Sequence‚ on page
After the sector erase command sequence is written,
the system should read the status on DQ7 (Data#
Polling) or DQ6 (Toggle Bit I) to ensure the device
has accepted the command sequence, and then read
DQ3. If DQ3 is 1, the internally controlled erase cycle
has begun; all further commands (other than Erase
Suspend) are ignored until the erase operation is
complete. If DQ3 is 1, the device will accept addi-
tional sector erase commands. To ensure the com-
mand has been accepted, the system software
should check the status of DQ3 prior to and following
each subsequent sector erase command. If DQ3 is
high on the second status check, the last command
might not have been accepted.
shows the outputs for DQ3.
16.
Sector Erase Command
Table 6 on page 22
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