AM29SL400C SPANSION [SPANSION], AM29SL400C Datasheet - Page 21

• Manufacturer Part Number: AM29SL400C
• Description: 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
• Manufacturer: SPANSION [SPANSION]

subsections describe the functions of these bits.
DQ7, RY/BY#, and DQ6 each offer a method for de-
termining whether a program or erase operation is
complete or in progress. These three bits are dis-
cussed first.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host sys-
tem whether an Embedded Algorithm is in progress
or completed, or whether the device is in Erase Sus-
pend. Data# Polling is valid after the rising edge of
the final WE# pulse in the program or erase com-
mand sequence.
During the Embedded Program algorithm, the device
outputs on DQ7 the complement of the datum pro-
grammed to DQ7. This DQ7 status also applies to
programming during Erase Suspend. When the Em-
bedded Program algorithm is complete, the device
outputs the datum programmed to DQ7. The system
must provide the program address to read valid sta-
tus information on DQ7. If a program address falls
within a protected sector, Data# Polling on DQ7 is
active for approximately 1 µs, then the device re-
turns to reading array data.
During the Embedded Erase algorithm, Data# Polling
produces a 0 on DQ7. When the Embedded Erase al-
gorithm is complete, or if the device enters the Erase
Suspend mode, Data# Polling produces a 1 on DQ7.
This is analogous to the complement/true datum
output described for the Embedded Program algo-
rithm: the erase function changes all the bits in a
sector to 1; prior to this, the device outputs the
complement, or 0. The system must provide an ad-
dress within any of the sectors selected for erasure
to read valid status information on DQ7.
After an erase command sequence is written, if all
sectors selected for erasing are protected, Data#
Polling on DQ7 is active for approximately 100 µs,
then the device returns to reading array data. If not
all selected sectors are protected, the Embedded
Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected.
When the system detects DQ7 has changed from the
complement to true data, it can read valid data at
DQ7–DQ0 on the following read cycles. This is be-
ca us e DQ 7 m ay c h a n ge a s ynch r onou sly with
DQ0–DQ6 while Output Enable (OE#) is asserted
low.
(During Embedded Algorithms), illustrates this.
Table 6 on page 22
Polling on DQ7.
gorithm.
March 3, 2005
Figure 19‚ on page 33
Figure 5
shows the outputs for Data#
shows the Data# Polling al-
Data# Polling Timings
A d v a n c e
I n f o r m a t i o n
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin
that indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid
after the rising edge of the final WE# pulse in the
command sequence. Since RY/BY# is an open-drain
output, several RY/BY# pins can be tied together in
parallel with a pull-up resistor to V
If the output is low (Busy), the device is actively
erasing or programming. (This includes program-
Notes:
1. VA = Valid address for programming. During a sector
2. DQ7 should be rechecked even if DQ5 = 1 because DQ7
No
erase operation, a valid address is an address within any
sector selected for erasure. During chip erase, a valid
address is any non-protected sector address.
may change simultaneously with DQ5.
Figure 5. Data# Polling Algorithm
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
No
Yes
No
Yes
Yes
CC
.
PASS
19