AM29PDLI27H SPANSION [SPANSION], AM29PDLI27H Datasheet - Page 14

• Manufacturer Part Number: AM29PDLI27H
• Description: 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
• Manufacturer: SPANSION [SPANSION]

cess has access time of t
selects the device and OE# is the output control and
should be used to gate data to the output inputs if the
device is selected. Fast page mode accesses are ob-
tained by keeping A22–A3 constant and changing
A2–A0 to select the specific word within that page.
Simultaneous Operation
In addition to the conventional features (read, pro-
gram, erase-suspend read, and erase-suspend pro-
gram), the device is capable of reading data from one
bank of memory while a program or erase operation is
in progress in another bank of memory (simultaneous
operation). The bank can be selected by bank ad-
dresses (A22–A20) with zero latency.
The simultaneous operation can execute multi-func-
tion mode in the same bank.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
The device features an Unlock Bypass mode to facil-
itate faster programming. Once a bank enters the Un-
lock Bypass mode, only two write cycles are required
to program a word, instead of four. The “Word Pro-
gram Command Sequence” section has details on
12
Bank C
Bank D
Bank A
Bank B
Bank
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Word 6
Word 7
Word
IL
, and OE# to V
Table 3. Bank Select
Table 2. Page Select
IH
ACC
.
A2
0
0
0
0
1
1
1
1
001, 010, 011
100, 101, 110
or t
A22–A20
A D V A N C E
CE
000
111
. Here again, CE#
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
Am29PDL127H
I N F O R M A T I O N
programming data to the device using both standard
and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device.
space that each sector occupies. A “bank address” is
the address bits required to uniquely select a bank.
Similarly, a “sector address” refers to the address bits
required to uniquely select a sector. The “Command
Definitions” section has details on erasing a sector or
the entire chip, or suspending/resuming the erase op-
eration.
I
tive current specification for the write mode. The
Characteristics
tables and timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program operations
through the ACC function. This function is primarily in-
tended to allow faster manufacturing throughput at the
factory.
If the system asserts V
matically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the
time required for program operations. The system
would use a two-cycle program command sequence
as required by the Unlock Bypass mode. Removing
V
mal operation. Note that V
WP#/ACC for operations other than accelerated pro-
gramming, or device damage may result. In addition,
the WP#/ACC pin should be raised to V
use. That is, the WP#/ACC pin should not be left float-
ing or unconnected; inconsistent behavior of the de-
vice may result.
Autoselect Functions
If the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ15–DQ0. Standard read cycle timings apply in
this mode. Refer to the
lect Command Sequence
tion.
Standby Mode
When the system is not reading or writing to the de-
vice, it can place the device in the standby mode. In
this mode, current consumption is greatly reduced,
and the outputs are placed in the high impedance
state, independent of the OE# input.
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at V
CC2
HH
in the DC Characteristics table represents the ac-
from the WP#/ACC pin returns the device to nor-
section contains timing specification
HH
Autoselect Mode
Table 4
on this pin, the device auto-
HH
sections for more informa-
must not be asserted on
indicates the address
June 30, 2003
CC
and
when not in
IO
± 0.3 V.
Autose-
AC