AM29PDL128G70 SPANSION [SPANSION], AM29PDL128G70 Datasheet
AM29PDL128G70
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AM29PDL128G70 Summary of contents
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AmPDL128G Data Sheet Continuity of Specifications Continuity of Ordering Part Numbers For More Information Publication Number 25685 Revision B Amendment +2 Issue Date July 29, 2002 ...
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PRELIMINARY Am29PDL128G 128 Megabit ( 16-Bit 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO DISTINCTIVE CHARACTERISTICS ARCHITECTURAL ADVANTAGES 128Mbit Page Mode device — Word (16-bit) or double word (32-bit) mode selectable via WORD# ...
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GENERAL DESCRIPTION The Am29PDL128G is a 128 Mbit, 3.0 volt-only Page Mode and Simultaneous Read/Write Flash memory device orga- nized as 8 Mwords double words (One word is equal to two bytes). The device is offered in ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5 Block Diagram . . . . . . . . . . ...
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Hardware Reset (RESET#) .................................................... 54 Figure 13. Reset Timings ................................................................ 54 Word/Double Word Configuration (WORD#) .......................... 55 Figure 14. WORD# Timings for Read Operations........................... 55 Figure 15. WORD# Timings for Write Operations........................... 55 Erase and Program Operations .............................................. 56 Figure ...
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PRODUCT SELECTOR GUIDE Part Number Voltage Range: V Speed Option Voltage Range: V Max Access Time ACC Max CE# Access Max Page Access PACC Max OE# Access ...
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SIMULTANEOUS OPERATION BLOCK DIAGRAM Mux A21–A0 RY/BY# A21–A0 RESET# STATE WE# CONTROL CE# & DW/W# COMMAND WP# REGISTER ACC DQ0–DQ15 A21–A0 Mux OE# DW/W# ...
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CONNECTION DIAGRAMS OE# V DQ30 WORD# CE# DQ15 A21 A20 DQ31/A RFU WP# WE RY/BY DQ16 A2 ...
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PIN DESCRIPTION A21– Addresses DQ30–DQ0 = 31 Data Inputs/Outputs DQ31/A-1 = DQ31 (Data Input/Output, double word mode), A-1 (LSB Address In- put, word mode) CE# = Chip Enable OE# = Output Enable WE# = Write Enable WP# = ...
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... Extended (– +125 C) PACKAGE TYPE PE = 80-Ball Fortified Ball Grid Array ( 1 mm pitch package (LAB080) SPEED OPTION See Product Selector Guide and Valid Combinations Valid Combinations for BGA Packages Order Number Am29PDL128G70R Am29PDL128G70 Am29PDL128G80 Am29PDL128G90 Am29PDL128G F BGA) Package Marking PD128G70R PEI I PD128G70V ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...
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ACC OE Page Mode Read The device is capable of fast page mode read and is compatible with the page mode Mask ROM read oper- ation. This ...
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Accelerated Program Operation The device offers accelerated program operations through the ACC function. This function is primarily in- tended to allow faster manufacturing throughput at the factory. If the system asserts V on this pin, the device auto- HH matically ...
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Sector Address Bank Sector (A21-A11) SA0 00000000000 SA1 00000000001 SA2 00000000010 SA3 00000000011 SA4 00000000100 SA5 00000000101 SA6 00000000110 SA7 00000000111 SA8 00000001XXX SA9 00000010XXX SA10 00000011XXX SA11 00000100XXX SA12 00000101XXX SA13 00000110XXX SA14 00000111XXX SA15 00001000XXX SA16 00001001XXX SA17 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA39 00100000XXX SA40 00100001XXX SA41 00100010XXX SA42 00100011XXX SA43 00100100XXX SA44 00100101XXX SA45 00100110XXX SA46 00100111XXX SA47 00101000XXX SA48 00101001XXX SA49 00101010XXX SA50 00101011XXX SA51 00101100XXX SA52 00101101XXX SA53 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA81 01001010XXX SA82 01001011XXX SA83 01001100XXX SA84 01001101XXX SA85 01001110XXX SA86 01001111XXX SA87 01010000XXX SA88 01010001XXX SA89 01010010XXX SA90 01010011XXX SA91 01010100XXX SA92 01010101XXX SA93 01010110XXX SA94 01010111XXX SA95 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA120 01110001XXX SA121 01110010XXX SA122 01110011XXX SA123 01110100XXX SA124 01110101XXX SA125 01110110XXX SA126 01110111XXX SA127 01111000XXX SA128 01111001XXX SA129 01111010XXX SA130 01111011XXX SA131 01111100XXX SA132 01111101XXX SA133 01111110XXX SA134 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA159 10011000XXX SA160 10011001XXX SA161 10011010XXX SA162 10011011XXX SA163 10011100XXX SA164 10011101XXX SA165 10011110XXX SA166 10011111XXX SA167 10100000XXX SA168 10100001XXX SA169 10100010XXX SA170 10100011XXX SA171 10100100XXX SA172 10100101XXX SA173 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA198 10111111XXX SA199 11000000XXX SA200 11000001XXX SA201 11000010XXX SA202 11000011XXX SA203 11000100XXX SA204 11000101XXX SA205 11000110XXX SA206 11000111XXX SA207 11001000XXX SA208 11001001XXX SA209 11001010XXX SA210 11001011XXX SA211 11001100XXX SA212 ...
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Table 5. Sector Address Table (Continued) Sector Address Bank Sector (A21-A11) SA231 11100000XXX SA232 11100001XXX SA233 11100010XXX SA234 11100011XXX SA235 11100100XXX SA236 11100101XXX SA237 11100110XXX SA238 11100111XXX SA239 11101000XXX SA240 11101001XXX SA241 11101010XXX SA242 11101011XXX SA243 11101100XXX SA244 11101101XXX SA245 ...
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Device Am29PDL128G Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip- ment to automatically match a device to be pro- ...
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Table 8. Sector Block Addresses for Protection/Unprotection Sector Group A21 A20 A19 SGA0 SGA1 SGA2 SGA3 SGA4 SGA5 SGA6 ...
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Table 8. Sector Block Addresses for Protection/Unprotection (Continued) Sector Group A21 A20 A19 SGA32 SGA33 SGA34 SGA35 SGA36 SGA37 SGA38 0 1 ...
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Table 8. Sector Block Addresses for Protection/Unprotection (Continued) Sector Group A21 A20 A19 SGA66 SGA67 SGA68 SGA69 SGA70 SGA71 SGA72 1 1 ...
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It is possible to determine whether a sector is pro- tected or unprotected. See Autoselect Mode tails. Persistent Sector Protection The Persistent Sector Protection method replaces the old 12 V controlled protection method while at the same time enhancing flexibility ...
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PPB lock bit once again will lock the PPBs, and the device operates normally again. Note: to achieve the best protection, it’s recommended to execute the PPB lock bit set command early in the boot code, and protect the boot ...
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It permanently sets the device to operate using the Password Protection Mode not possible to re- verse this function also disables all further commands to the pass- word region. All program, and read operations are ...
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START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with A6-A0 = 0111010 Wait 150 µs ...
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Temporary Sector Unprotect This feature allows temporary unprotection of previ- ously protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RE- SET# pin During this mode, formerly protected ID sectors can ...
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The SecSi Sector area can be protected using one of the following procedures: Write the three-cycle Enter SecSi Sector Region command sequence, and then follow the in-system sector protect algorithm as shown in cept that RESET# may be at either ...
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COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-inde- ...
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Addresses (Double Word Addresses Mode) (Word Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch July 29, 2002 ...
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Addresses (Double Word Addresses Mode) (Word Mode) 27h 4Eh 28h 50h 29h 52h 2Ah 54h 2Bh 56h 2Ch 58h 2Dh 5Ah 2Eh 5Ch 2Fh 5Eh 30h 60h 31h 62h 32h 64h 33h 66h 34h 68h 35h 6Ah 36h 6Ch 37h ...
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Table 13. Primary Vendor-Specific Extended Query Addresses (Double Word Addresses Mode) (Word Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h 4Dh ...
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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device op- erations. Tables 14–17 define the valid register command sequences. Writing incorrect address and data values or writing them in the improper se- ...
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Exit SecSi Sec- tor command sequence. The Exit SecSi Sector com ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Tables 14 and 16 for program command sequence. Figure 3. Program Operation Chip Erase Command Sequence ...
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DQ7, DQ6, DQ2, or RY/BY# in the erasing bank. Refer to the Write Operation Status mation on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. ...
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Password Program commands are required. The user must enter the unlock cycle, password program command (38h) and the program address/data for each portion of the password when programming. There is no special addressing order ...
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DYB Write Command The DYB Write command is used to set or clear a DYB for a given sector. The high order address bits (A21–A11) are issued at the same time as the code 01h or 00h on DQ7-DQ0. All ...
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The DYB Write command is permitted if the SecSi sector is enabled. PPB Lock Bit Set Command The PPB Lock Bit set command is used for setting the PPB lock bit. During Password Protection mode, only the Password Unlock command ...
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Command Definitions Tables Table 14. Memory Array Command Definitions (x32 Mode) Command (Notes) Read (5) Reset (6) Manufacturer ID Device ID (10) Autoselect SecSi Sector (Note 7) Factory Protect Sector Group Protect Verify (9) Program Chip Erase Sector Erase Program/Erase ...
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Table 15. Sector Protection Command Definitions (x32 Mode) Command (Notes) Reset 1 SecSi Sector Entry 3 SecSi Sector Exit 4 SecSi Protection Bit Program ( Password Program ( Password Verify ( Password Unlock ...
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Table 16. Memory Array Command Definitions (x16 Mode) Command (Notes) Addr Data Addr Data Read ( Reset (6) 1 XXX Manufacturer ID 4 555 Device ID (10) 6 555 Autoselect SecSi Sector Factory (Note 7) 4 555 Protect ...
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Table 17. Sector Protection Command Definitions (x16 Mode) Command (Notes) Reset 1 SecSi Sector Entry 3 SecSi Sector Exit 4 SecSi Protection Bit Program ( Password Program ( Password Verify ( Password Unlock ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 18 and the following subsections describe the function of these bits. DQ7 and DQ6 each ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indi- cates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit ...
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Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Erase Suspended Sector Erase-Suspend- Erase Read Suspend Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied . . . . . . . . ...
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DC CHARACTERISTICS CMOS Compatible Parameter Symbol Parameter Description I Input Load Current LI A9, OE#, RESET# I LIT Input Load Current I Output Leakage Current LO V Active Inter-page Read Current, CC Word/Double Word Modes (Notes CC1 ...
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TEST CONDITIONS Device Under Test C 6 Note: Diodes are IN3064 or equivalent Figure 9. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 10. Input Waveforms ...
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AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t ...
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AC CHARACTERISTICS A21-A3 A2-A-1 Data Bus CE# OE# July 29, 2002 Same Page PACC t ACC Qa Figure 12. Page Read Operation Timings Am29PDL128G Ac Ad ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...
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AC CHARACTERISTICS Word/Double Word Configuration (WORD#) Parameter JEDEC Std Description t t CE# to WORD# Switching Low or High ELFL/ ELFH t WORD# Switching Low to Output HIGH Z FLQZ t WORD# Switching High to Output Active FHQV DQ15–DQ0 Switching ...
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AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS otes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data RY/BY# t VCS V CC otes sector address (for Sector Erase Valid Address ...
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AC CHARACTERISTICS t WC Valid PA Addresses CE# OE WE# t WPH Valid Data In WE# Controlled Write Cycle Figure 19. Back-to-back Read/Write Cycle Timings t RC Addresses VA t ACC ...
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AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read ...
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AC CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR Rise and Fall Time (See Note) VHH HH RESET# Setup Time for Temporary Sector t RSP Unprotect RESET# Hold ...
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AC CHARACTERISTICS ESET# SA, A6, A1, A0 Sector Group Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Double Word Program Time Word Program Time Accelerated Double Word Program Time Accelerated Word Program Time Double Word Mode Chip Program Time (Note 3) Word Mode Notes: 1. Typical ...
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PHYSICAL DIMENSIONS LAB080—80-Ball Fortified Ball Grid Array package 0. CORNER ID. (INK OR LASER) 1.00 ± 0.5 A1 TOP VIEW CORNER PACKAGE LAB 080 JEDEC N/A 15. 10.00 mm PACKAGE ...
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REVISION SUMMARY Revision A (October 29, 2001) Initial release. Revision A+1 (November 13, 2001) Simultaneous Operation Block Diagram Added drawing. Table 13, Primary Vendor-Specific Extended Query Corrected data for 4Dh and 4Eh addresses (dou- ble-word mode). Physical Dimensions Added LAB080 ...
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Table 9. Sector Protection Schemes Added field: Unprotected-PPB not changeable, DYB is changable. Figure 1. In-System Sector Protection/Sector Unprotection Algorithms Added Note Table 14. Memory Array Command Definitions (x32 Mode) Table 16. Memory Array Command Definitions (x16 Mode) Added SecSi ...