74AUP1G373GF,132 NXP Semiconductors, 74AUP1G373GF,132 Datasheet - Page 2

IC LATCH D-TYPE 6-XSON

74AUP1G373GF,132

Manufacturer Part Number
74AUP1G373GF,132
Description
IC LATCH D-TYPE 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G373GF,132

Logic Type
D-Type Transparent Latch
Package / Case
6-XSON, SOT891
Circuit
1:1
Output Type
Tri-State
Voltage - Supply
0.8 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
2.5ns
Current - Output High, Low
4mA, 4mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
74AUP
Polarity
Non-Inverting
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
22.1 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Current
50 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP1G373GF-H
74AUP1G373GF-H
935281332132
NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
5. Functional diagram
74AUP1G373
Product data sheet
Type number
74AUP1G373GW
74AUP1G373GM
74AUP1G373GF
Type number
74AUP1G373GW
74AUP1G373GM
74AUP1G373GF
74AUP1G373GN
74AUP1G373GS
74AUP1G373GN
74AUP1G373GS
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Logic symbol
Ordering information
Marking
3
1
6
D
LE
OE
001aae247
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
Q
4
All information provided in this document is subject to legal disclaimers.
Fig 2.
SC-88
XSON6
XSON6
XSON6
XSON6
1
3
6
Rev. 4 — 15 July 2010
IEC logic symbol
C1
EN
Description
plastic surface-mounted package; 6 leads
plastic extremely thin small outline package; no leads;
6 terminals; body 1  1.45  0.5 mm
plastic extremely thin small outline package; no leads;
6 terminals; body 1  1  0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
001aae248
Marking code
aW
aW
aW
aW
aW
Low-power D-type transparent latch; 3-state
4
[1]
Fig 3.
OE
LE
D
74AUP1G373
Logic diagram
D
LE
© NXP B.V. 2010. All rights reserved.
LE
Q
001aae249
Version
SOT363
SOT886
SOT891
SOT1115
SOT1202
Q
2 of 25

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