EVAL-ADAU1701EB AD [Analog Devices], EVAL-ADAU1701EB Datasheet - Page 31

• Manufacturer Part Number: EVAL-ADAU1701EB
• Description: SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
MULTIPURPOSE PINS
Table 37. Multipurpose Pin Configuration Registers
The ADAU1701 has 12 multipurpose (MP) pins that can be
individually programmed to be used as serial data inputs, serial
data outputs, digital control inputs and outputs to and from the
SigmaDSP core, or as inputs to the four-channel auxiliary ADC.
These pins allow the ADAU1701 to be used with external ADCs
and DACs, take analog or digital inputs to control settings such
as volume control, or output digital signals to drive LED
indicators.
MULTIPURPOSE PIN CONFIGURATION REGISTERS
Each multipurpose pin can be set to its different functions from
these registers (2080-2081). These two three-byte registers are
broken up into twelve 4-bit (nibble) sections that each control a
different MP pin as detailed in Table 37. Table 38 lists the
different functions of each nibble setting within the MP Pin
Configuration Registers. The MSB of each MP pin’s 4-bit
configuration inverts the input to or output from the pin. The
MP pins will have an internal pull-up resistor (approximately
10 kΩ) enabled when they are set to digital inputs (either GPIO
input or serial data port input).
Table 38. Multipurpose Pin Configuration Register Bit
Functions
GPIO PIN SETTING REGISTER
This register gives the user access through the control port to
set the GPIO pins. High or low settings can be directly written
Register
MP_CFG0 (2080)
MP_CFG1 (2081)
MPx[3:0]
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
Pin Function
Aux ADC input (see Table 40)
Reserved
Reserved
Serial Data Port – inverted (see Table
44)
Open Collector Output - inverted
GPIO Output – inverted
GPIO Input, no debounce – inverted
GPIO Input, debounced – inverted
N/A
Reserved
Reserved
Serial Data Port (see Table 44)
Open Collector Output
GPIO Output
GPIO Input, no debounce
GPIO Input, debounced
Bits[23:20]
MP5[3:0]
MP11[3:0]
Bits[19:16]
MP4[3:0]
MP10[3:0]
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Bits[15:12]
MP3[3:0]
MP9[3:0]
to or read from this register after setting bit 7 of the Core
Control Register. This register is updated once every LRCLK
frame (1/fs)
Table 39. GPIO Pin Setting Register (2056)
Register Bits
15:12
11
10
9
8
7
6
5
4
3
2
1
0
AUXILIARY ADC
The ADAU1701 has a four-channel auxiliary 8-bit ADC that
can be used to connect a potentiometer to control volume, tone,
or other parameter settings in the DSP program. Each of the
four channels is sampled at the audio sampling frequency (f
which defaults to 48 kHz with a 12.288 MHz crystal connected
to the ADAU1701 oscillator. Full-scale input on this ADC is
3.3V, so the step size is approximately 13mV (3.3V/256 steps).
The input resistance of the ADC is approximate 20 kΩ. Table 40
indicates which four MP pins are mapped to the four channels
of the aux ADC. The aux ADC is enabled for those pins by
writing 1111 to the appropriate pin’s portion of the
Multipurpose Pin Configuration Registers.
The auxiliary ADC is turned on by writing a 1 to bit 15 of the
Aux ADC enable register (Table 42).
Noise on the ADC input could cause the digital output to be
constantly changing by a few LSBs. In cases where the aux ADC
is used as a volume control, this would cause small gain
fluctuations. To avoid this, a low-pass filter or hysteresis can be
added to the aux ADC signal path. These functions can be
enabled through the Auxiliary ADC & Power Control Register
(2082), shown in Table 41. The filter is enabled by default when
the aux ADC is enabled. When data is read from the aux ADC
registers, 2 bytes (12 bits of data, plus zero-padded LSBs) are
available because of this filtering.
Bits[11:8]
MP2[3:0]
MP8[3:0]
Function
Unused
MP11 setting
MP10 setting
MP9 setting
MP8 setting
MP7 setting
MP6 setting
MP5 setting
MP4 setting
MP3 setting
MP2 setting
MP1 setting
MP0 setting
Bits[7:4]
MP1[3:0]
MP7[3:0]
ADAU1701
MP0[3:0]
Bits[3:0]
MP6[3:0]
S
),