EVAL-ADAU1701EB AD [Analog Devices], EVAL-ADAU1701EB Datasheet - Page 10

• Manufacturer Part Number: EVAL-ADAU1701EB
• Description: SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
• Manufacturer: AD [Analog Devices]

ADAU1701
PIN CONFIGURATION AND FUNCTIONS
Table 11. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
Type
PWR
A_IN
A_IN
A_IN
D_IN
D_IN
D_IN
D_IO
D_IO
D_IO
D_IO
PWR
PWR
1
Mnemonic
AGND
ADC1
ADC_RES
ADC0
RESETB
SELFBOOT
ADDR0
MP4
MP5
MP1
MP0
DGND
DVDD
SELFBOOT
ADC_RES
RESETB
ADDR0
Description
AGND is an analog ground pin. The AGND, DGND, and PGND pins can be tied
directly together in a common ground plane. AGND should be decoupled to an
AVDD pin with a 100 nF capacitor.
Analog input 1, full-scale 100 μA rms input. Current input allows input voltage
level to be scaled with an external resistor.
ADC reference current. The full-scale current of the ADCs can be set with an
external resistor connected between this pin and ground.
Analog Input 0, full-scale 100 μA rms input. Current input allows input voltage
level to be scaled with an external resistor.
RESETB is an active-low reset input. Reset is triggered on a high-to-low edge and
the part will exit reset on a low-to-high edge. For detailed information about
initialization, see the Power-Up Sequence section.
SELFBOOT selects control port (0) or self-boot (1). Setting this pin high will
initiate a selfboot operation when the ADAU1701 is brought out of reset. This pin
can be tied directly to the control voltage or pulled up/down with a resistor.
I
ADAU1701s to be used on the same I
common SPI CLATCH signal.
Multi-Purpose – GPIO or Serial input port LRCLK (INPUT_LRCLK)
Multi-Purpose – GPIO or Serial input port BCLK (INPUT_BCLK)
Multi-Purpose – GPIO or Serial Input port data 1 (SDATA_IN0)
Multi-Purpose – GPIO or Serial Input port data 0 (SDATA_IN1)
DGND is a digital ground pin. The AGND, DGND, and PGND pins can be tied
directly together in a common ground plane. DGND should be decoupled to a
DVDD pin with a 100 nF capacitor.
1.8 V Digital Supply. This can be supplied either externally or generated from a
3.3 V supply with the on-board 1.8 V regulator. DVDD should be decoupled to
AGND
DGND
2
ADC1
ADC0
C and SPI Address 0, in combination with ADDR1will allow up to four
MP4
MP5
MP1
MP0
10
11
12
1
2
3
4
5
6
7
8
9
Figure 14. 48-Lead LQFP Pin Configuration
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
Rev. PrF | Page 10 of 43
(Not to Scale)
ADAU1701
TOP VIEW
43 42 41 40
39 38 37
2
C bus and up to two ICs to be used with a
36
35
34
33
32
31
30
29
28
26
25
27
AVDD
PLL_LF
PVDD
PGND
MCLKI
OSCO
RSVD
MP2
MP3
MP9
DGND
MP8
Preliminary Technical Data