EVAL-AD5680EB AD [Analog Devices], EVAL-AD5680EB Datasheet - Page 10

• Manufacturer Part Number: EVAL-AD5680EB
• Description: 5 V 18-Bit nanoDAC in a SOT-23
• Manufacturer: AD [Analog Devices]

AD5680
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or integral nonlinearity is a
measurement of the maximum deviation, in LSBs, from a
straight line passing through the endpoints of the DAC transfer
function. Figure 4 shows a typical INL vs. code plot.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB maximum
ensures monotonicity. Figure 5 shows a typical DNL vs. code plot.
Zero-Code Error
Zero-code error is a measurement of the output error when
zero code (0x00000) is loaded to the DAC register. Ideally, the
output should be 0 V. The zero-code error is always positive in
the AD5680 because the output of the DAC cannot go below
0 V. It is due to a combination of the offset errors in the DAC
and the output amplifier. Zero-code error is expressed in mV. A
plot of zero-code error vs. temperature can be seen in Figure 7.
Full-Scale Error
Full-scale error is a measurement of the output error when full-
scale code (0x3FFFF) is loaded to the DAC register. Ideally, the
output should be V
percent of full-scale range.
Gain Error
This is a measure of the span error of the DAC. It is the deviation
in slope of the DAC transfer characteristic from ideal expressed
as a percent of the full-scale range.
Zero-Code Error Drift
This is a measurement of the change in zero-code error with a
change in temperature. It is expressed in μV/°C.
Gain Temperature Coefficient
This is a measurement of the change in gain error with changes
in temperature. It is expressed in (ppm of full-scale range)/°C.
DD
− 1 LSB. Full-scale error is expressed in
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Offset Error
Offset error is a measure of the difference between V
and V
transfer function. Offset error is measured on the AD5680 with
Code 2048 loaded in the DAC register.
positive.
DC Power Supply Rejection Ratio (PSRR)
This indicates how the output of the DAC is affected by
changes in the supply voltage. PSRR is the ratio of the change in
V
measured in dB. V
Output Voltage Settling Time
This is the amount of time it takes for the output of a DAC to
settle to a specified level for a ¼ to ¾ full-scale input change
and is measured from the 24
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is injected into the analog
output when the input code in the DAC register changes state.
It is normally specified as the area of the glitch in nV-s, and is
measured when the digital input code is changed by 1 LSB at
the major carry transition (0x1FFFF to 0x20000). See Figure 16.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC, but is measured when the DAC output is not updated. It
is specified in nV-s and measured with a full-scale code change
on the data bus, that is, from all 0s to all 1s and vice versa.
Total Harmonic Distortion (THD)
This is the difference between an ideal sine wave and its
attenuated version using the DAC. The sine wave is used as the
reference for the DAC. The THD is a measurement of the
harmonics present on the DAC output. It is measured in dB.
Noise Spectral Density
This is a measurement of the internally generated random
noise. Random noise is characterized as a spectral density
(voltage per √Hz). It is measured by loading the DAC to
midscale and measuring noise at the output. It is measured in
nV/√Hz. Figure 21 shows a plot of noise spectral density.
OUT
to a change in V
OUT
(ideal) expressed in mV in the linear region of the
REF
DD
is held at 2 V, and V
for full-scale output of the DAC. It is
th
falling edge of SCLK.
It can be negative or
DD
is varied by ±10%.
OUT
(actual)