VRS51C1000-40-L RAMTRON [Ramtron International Corporation], VRS51C1000-40-L Datasheet - Page 26

• Manufacturer Part Number: VRS51C1000-40-L
• Description: Versa 8051 MCU with 64KB of IAP/ISP Flash
• Manufacturer: RAMTRON [Ramtron International Corporation]

UART Reception in Mode 2 and Mode 3
One to zero transitions on the RXD pin initiate
reception. It is for this reason that RXD is sampled at a
rate of 16 multiplied by the baud rate that has been
established.
When a transition is detected, the 1FFh is written into
the input shift register and the divide-by-16 counter is
immediately reset.
During the 7
time; the bit detector samples the value of RXD. The
accepted value is the value that was seen in at least
two of the three samples. If the value accepted during
the first bit time is not zero, the receive circuits are
reset and the unit goes back to searching for another
one to zero transition. If the start bit is valid, it is shifted
into the input shift register, and the reception of the
rest of the frame will proceed.
For a receive operation, the data bits come in from the
right as 1’s shift out on the left. As soon as the start bit
arrives at the leftmost position in the shift register (9-bit
register), it tells the RX control block to do one more
shift, to set RI, and to load SBUF and RB8. The signal
to set RI and to load SBUF and RB8 will be generated
if, and only if, the following conditions are satisfied at
the instance when the final shift pulse is generated:
If both conditions are met, the 9
goes into RB8, and the first 8 data bits go into SBUF. If
one of these conditions is not met, the received frame
is completely lost. One bit time later, whether the
above conditions are met or not, the unit goes back to
searching for a one to zero transition at the RXD input.
Please note that the value of the received stop bit is
unrelated to SBUF, RB8 or RI.
______________________________________________________________________________________________
www.ramtron.com
VRS51C1000
-
-
Either SM2 = 0 or the received 9
RI = 0
th
, 8
th
and 9
th
counter states of each bit
th
data bit received
th
bit equal 1
UART Baud Rates
In Mode 0, the baud rate is fixed and can be
represented by the following formula:
In Mode 2, the baud rate depends on the value of the
SMOD bit in the PCON SFR. From the formula below,
we can see that if SMOD = 0 (which is the value on
reset), the baud rate is 1/32 the oscillator frequency.
The Timer 1 and/or Timer 2 overflow rate determines
the baud rates in Modes 1 and 3.
Generating UART Baud Rate with Timer 1
When Timer 1 functions as a baud rate generator, the
baud rate in Modes 1 and 3 are determined by the
Timer 1 overflow rate.
Timer 1 must be configured as an 8-bit timer (TL1) with
auto-reload with TH1 value when an overflow occurs
(Mode 2). In this application, the Timer 1 interrupt
should be disabled.
The two following formulas can be used to calculate
the baud rate and the reload value to be written into
the TH1 register.
Mode 1,3 Baud Rate =
Mode 2 Baud Rate = 2
Mode 1,3 Baud Rate = 2
Mode 0 Baud Rate = Oscillator Frequency
SMOD
32 x 12(256 – TH1)
SMOD
x (Oscillator Frequency)
2
x Timer 1 Overflow Rate
SMOD
page 26 of 48
x Fosc
64
12
32