LC89515 Sanyo, LC89515 Datasheet - Page 5

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LC89515

Manufacturer Part Number
LC89515
Description
CD-ROM/CD-I Error Correction/ Host Interface LSI
Manufacturer
Sanyo
Datasheet

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Write
Note: The values of the shaded bits are ignored.
6. Additional Registers
RS
0
1
Write
[R14] CTRL2: Control 2
STENCTL (STEN control)
This bit is set to 0 on reset.
STENTRG (STEN trigger)
DLAEN (drive last address enable)
BCKSL (bit clock select)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
AR
0.........The external STEN pin goes to 0 when the microprocessor writes one byte of status information. (This is
1.........The external STEN pin goes to 0 due to 0 being written to the STENTRG register when the
This bit is only valid when STENCTL is 1.
The external STEN pin goes to 0 when a 0 is written to this bit.
This bit is reset when the host reads the last byte, i.e., when the external STEN pin has become 1.
When WRRQ is set to 0 during buffering, buffering continues until the next SYNC signal arrives and then stops.
This results in the sectors that are buffered when WRRQ was set to 0 becoming valid. (This bit is set to 0 on
reset.)
Setting this bit to 1 allows the bit clock from the CD-DSP to be inverted. (SDATA is acquired on the rising edge
of BCK.) (This bit is set to 0 on reset.)
R10
R11
R12
R13
R14
R15
No.
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
identical to LC8951 operation.)
microprocessor writes * bytes of status information.
SBOUT
IFCTRL
DTTRG
DTACK
Symbol
RESET
CTRL0
CTRL1
CTRL2
DBCH
DACH
DBCL
DACL
WAH
WAL
PTH
PTL
AR
CMDIEN
DECEN
SYIEN
BIT7
msb
A
A
A
A
A
B
A
0
15
15
15
7
7
7
7
DTEIEN
SYDEN
BIT6
A
A
A
B
A
A
A
0
14
14
14
6
6
6
6
DSCREN
DECIEN
LC89515K
E01RQ
BIT5
A
A
A
B
A
A
A
0
13
13
13
5
5
5
5
COWREN
AUTORQ
CMDBK
BCKSL
BIT4
A
A
A
B
A
A
A
12
12
12
4
4
4
4
ERAMRQ
MODRQ
DLAEN
DTWAI
BIT3
B
A
A
A
A
B
A
A
A
11
11
11
11
3
3
3
3
3
FORMRQ
STWAI
WRRQ
BIT2
B
A
A
A
A
B
A
A
A
0
10
10
10
10
2
2
2
2
2
STENCTL
MBCKRQ
DOUTEN
QRQ
BIT1
A
B
B
A
A
A
A
A
A
1
1
9
1
9
1
9
1
9
No. 4272-5/6
STENTRG
SOUTEN
SHDREN
BIT0
PRQ
lsb
A
B
B
A
A
A
A
A
A
0
0
8
0
8
0
8
0
8

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