LC8901Q Sanyo, LC8901Q Datasheet - Page 9

• Manufacturer Part Number: LC8901Q
• Description: Digital Audio Interface Receiver
• Manufacturer: Sanyo

LPF Pin
Setting the LPF pin high sets the PLL low-pass filter time constant to a mode in which it is automatically switched by the
PLL locking state. This pin should be set high normally.
Microprocessor Interface
The data input pin setting, output data format setting, and subcode output are controlled through the microprocessor
interface. The following item describes the interface I/O formats.
Microprocessor Interface Format
Address
Bits B0 to A3 in the format figure are the address. There are two dedicated addresses allocated, one for data input and
one for data output. Use the input address for data input and the output address for data output.
Address Codes
Data input
Data output
Mode
B0
H
L
B1
H
L
B2
H
H
B3
L
L
A0
L
L
LC8901, 8901Q
A1
H
H
A2
H
H
A3
L
L
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